SCMP65R190BP product image

Product Detail

SCMP65R190BP

SineSemi 中晶新源Core Authorized Distributor

SiC MOSFETsPDFN5060-8L
Download Datasheet

Specifications

Automotive (Y/N)
N
Package
PDFN5060-8L
Configuration
N
Tj
175 °C
VDS_Max
650 V
ID_Max
10 A
VGS_Max
-10/+22 V
VGS(th)_Typ
3.2 V
RDS(ON)_Typ @VGS=18V,25°C
190 mΩ
RDS(ON)_Max @VGS=18V,25°C
240 mΩ
RDS(ON)_Typ @VGS=18V,175°C
265 mΩ
EAS_Max
164 mJ
Ciss_Typ
261 pF
Coss_Typ
22 pF
Crss_Typ
3 pF
Qg_Typ
13.5 nC
MPQ
5000 pcs
MOQ
50000 pcs

Package & Schematic

SCMP65R190BP package outline, pin configuration and schematic
Package outline · Pin configuration · Schematic (from SineSemi official datasheet)

Online Datasheet

Compiled from the manufacturer's datasheet; the official document prevails.

SCMP65R190BP

650V N-Channel Silicon Carbide Power MOSFET

Product Summary
VDS RDS(ON), typ ID, max
650 V 190 mΩ @ VGS = 18V 10.0 A

PDFN5060-8L

Maximum Ratings (@ TC = 25°C, unless otherwise specified.)
Parameter Symbol Value Unit
Drain - Source Voltage VDS 650 V
Gate - Source Voltage (Absolute maximum) VGSmax -10/+22 V
Gate - Source Voltage (Recommended operating) VGSop -5/+18 V
Continuous Drain Current (VGS = 18V) (1) (TC = 25°C) ID 10.0 A
Continuous Drain Current (VGS = 18V) (1) (TC = 100°C) ID 7.1 A
Pulsed Drain Current (2) IDM 40 A
Single Pulse Avalanche Energy (3) EAS 164 mJ
Power Dissipation (TC = 25°C) PD 54 W
Power Dissipation (TC = 100°C) PD 27 W
Junction & Storage Temperature Range TJ, TSTG -55 ~ +175 °C
Thermal Characteristics
Parameter Symbol Typ Max Unit
Thermal Resistance, Junction-to-Ambient (4) R_θJA 40 50 °C/W
Thermal Resistance, Junction-to-Case (5) R_θJC 2.4 2.8 °C/W

Electrical Characteristics (@ TJ = 25°C, unless otherwise specified.)

Off Characteristics (6)
Parameter Symbol Test Condition Min Typ Max Units
Drain-Source Breakdown Voltage V(BR)DSS VGS = 0V, ID = 1.0mA 650 — — V
Zero Gate Voltage Drain Current IDSS VDS = 650V, VGS = 0V — — 100 µA
Gate-Source Leakage Current IGSS VGS = +22V, VDS = 0V — — 200 nA
VGS = -10V, VDS = 0V — — -200 nA
On Characteristics (6)
Parameter Symbol Test Condition Min Typ Max Units
Gate Threshold Voltage VGS(th) VGS = VDS, ID = 1.0mA, TJ = 25°C 2.1 3.2 4.2 V
VGS = VDS, ID = 1.0mA, TJ = 175°C — 2.3 — V
Static Drain-Source On-Resistance RDS(on) VGS = 18V, ID = 5.0A, TJ = 25°C — 190 240 mΩ
VGS = 18V, ID = 5.0A, TJ = 175°C — 265 — mΩ
VGS = 15V, ID = 5.0A, TJ = 25°C — 250 — mΩ
VGS = 15V, ID = 5.0A, TJ = 175°C — 290 — mΩ
Diode Forward Voltage VSD VGS = -5.0V, ISD = 5.0A, TJ = 25°C — 5.0 — V
VGS = -5.0V, ISD = 5.0A, TJ = 175°C — 4.4 — V
Dynamic Characteristics (7)
Parameter Symbol Test Condition Min Typ Max Units
Input Capacitance Ciss VDS = 400V, VGS = 0V, f = 1MHz — 261 — pF
Output Capacitance Coss — 22 — pF
Reverse Transfer Capacitance Crss — 3.0 — pF
Gate Resistance Rg VGS = 0V, VDS = 0V, f = 1MHz — 32 — Ω
Switching Characteristics (7)
Parameter Symbol Test Condition Min Typ Max Units
Turn-On Switching Loss Eon VDS = 400V, ID = 5.0A, RG = 10Ω, VGS = -5/18V — 20 — µJ
Turn-Off Switching Loss Eoff — 7.8 — µJ
Total Switching Loss Etot — 28 — µJ
Turn-On Delay Time td(on) VDS = 400V, ID = 5.0A, RG = 10Ω, VGS = -5/18V — 8.2 — ns
Rise Time tr — 17 — ns
Turn-Off Delay Time td(off) — 18 — ns
Fall Time tf — 12 — ns
Gate Charge Characteristics (7)
Parameter Symbol Test Condition Min Typ Max Units
Total Gate Charge (VGS = 18V) Qg VDS = 400V, ID = 5.0A, VGS = -5/18V — 13.5 — nC
Gate-Source Charge Qgs — 3.2 — nC
Gate-Drain Charge Qgd — 5.3 — nC
Drain-Source Diode Characteristics (7)
Parameter Symbol Test Condition Min Typ Max Units
Body Diode Reverse Recovery Time trr VDS = 400V, VGS = -5.0V, ISD = 5.0A, di/dt = 1000A/µs — 8.3 — ns
Body Diode Reverse Recovery Charge Qrr — 21 — nC
Peak Reverse Recovery Current Irrm — 4.3 — A
Diode Forward Current IS TC = 25°C — — 10 A

Notes:

  1. This current is chip limited, which is calculated based on Rthjc.
  2. This current is calculated on single pulse with 10µs Single Pulse.
  3. Defined by design, not subject to production test, EAS condition: TJ = 25°C, VDD = 325V, VGS = 10V, L = 10mH.
  4. Device mounted on FR-4 substrate PC board with 2oz copper in 1inch square cooling area.
  5. Thermal resistance from junction to the exposed pad.
  6. Short duration pulse test used to minimize self-heating effect.
  7. Defined by design, not subject to production.