SMT12T01AHTT2 product image

Product Detail

SMT12T01AHTT2

SineSemi 中晶新源Core Authorized Distributor

LV & MV MOSFETsTOLT
Download Datasheet

Specifications

Package
TOLT
Configuration
N
VDS_Max
120 V
ID
363 A
RDS(ON)_Max @VGS=10V
1.8 mΩ
Automotive (Y/N)
N
VGS(th)_Typ
3 V
RDS(ON)_Typ @VGS=10V
1.4 mΩ
VGS_Max
±20 V
Tj
175 °C
EAS_Max
2560 mJ
Ciss_Typ
12205 pF
Coss_Typ
2542 pF
Crss_Typ
69 pF
Qg_Typ
156 nC
ESD
No
MPQ
1300 pcs
MOQ
3900 pcs
App: Motor Drive
Y
App: HF Power
Y
App: General Switch
Y

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Package & Schematic

SMT12T01AHTT2 package outline, pin configuration and schematic
Package outline · Pin configuration · Schematic (from SineSemi official datasheet)

Online Datasheet

Compiled from the manufacturer's datasheet; the official document prevails.

SMT12T01AHTT2

120V N-Channel Power MOSFET

Product Summary
VDS RDS(ON)_TYP I_D_MAX
120 V 1.4 mΩ @VGS = 10V 363 A

TOLT

Features
  • Low On-Resistance
  • Excellent FoM (figure of merit)
  • 100% ΔVDS & UIS & Rg Tested
Applications
  • High-Performance Power Supplies
  • Motor Drives
  • Hard Switching and High Speed Circuit
Mechanical Data
  • Green Molding Compound
  • Moisture Sensitivity: Level 1 per J-STD-020
  • UL Flammability Classification Rating 94V-0
Ordering Information
Orderable Part Number Package Type Device Marking Form Quantity (pcs)
SMT12T01AHTT2 TOLT 12T01AH2 13" Tape&Reel 2,000
Maximum Ratings (@ TC = 25°C, unless otherwise specified.)
Parameter Symbol Value Unit
Drain - Source Voltage VDS 120 V
Gate - Source Voltage VGS ±20 V
Continuous Drain Current (VGS = 10V) (1) ID @ TC = 25°C 363 A
ID @ TC = 100°C 257 A
Pulsed Drain Current (2) IDM 1378 A
Single Pulse Avalanche Energy (3) EAS 2560 mJ
Single Pulse Avalanche Current (L = 0.3mH) IAS 88 A
Power Dissipation PD @ TC = 25°C 455 W
PD @ TC = 100°C 227 W
Junction & Storage Temperature Range TJ, TSTG -55 ~ +175 °C
Thermal Characteristics
Parameter Symbol Typ. Max. Unit
Thermal Resistance, Junction-to-Ambient (4) R_θJA 30 40 °C/W
Thermal Resistance, Junction-to-Case (5) R_θJC 0.25 0.33 °C/W

Electrical Characteristics (@ TJ = 25°C, unless otherwise specified.)

Off Characteristics (6)
Parameter Symbol Test Condition Min. Typ. Max. Unit
Drain-Source Breakdown Voltage V(BR)DSS VGS = 0V, ID = 250µA 120 — — V
Zero Gate Voltage Drain Current IDSS VDS = 120V, VGS = 0V — — 1.0 µA
TJ = 125°C — — 100 µA
Gate-Source Leakage Current IGSS VGS = ±20V, VDS = 0V — — ±100 nA
On Characteristics (6)
Parameter Symbol Test Condition Min. Typ. Max. Unit
Gate Threshold Voltage VGS(th) VGS = VDS, ID = 250µA 2.0 3.0 4.0 V
Static Drain-Source On-Resistance RDS(ON) VGS = 10V, ID = 80A — 1.4 1.8 mΩ
Forward Transconductance gfs VDS = 5.0V, ID = 20A — 75 — S
Diodes Forward Voltage VSD IS = 2.0A, VGS = 0V — 0.7 1.2 V
Dynamic Characteristics (7)
Parameter Symbol Test Condition Min. Typ. Max. Unit
Input Capacitance Ciss — 12205 — pF
Output Capacitance Coss VDS = 60V, VGS = 0V, f = 1MHz — 2542 — pF
Reverse Transfer Capacitance Crss — 69 — pF
Gate Resistance Rg VGS = 0V, VDS = 0V, f = 1MHz — 1.4 — Ω
Switching Characteristics (7)
Parameter Symbol Test Condition Min. Typ. Max. Unit
Turn-On Delay Time td(on) — 29 — ns
Rise Time tr VGS = 10V, VDS = 60V — 43 — ns
Turn-Off Delay Time td(off) ID = 80A, RGEN = 3.0Ω — 68 — ns
Fall Time tf — 41 — ns
Gate Charge Characteristics (7)
Parameter Symbol Test Condition Min. Typ. Max. Unit
Total Gate Charge (VGS = 10V) Qg — 156 — nC
Total Gate Charge (VGS = 7.0V) Qg VDS = 60V, ID = 80A — 113 — nC
Gate-Source Charge Qgs VGS = 10V — 54 — nC
Gate-Drain Charge Qgd — 29 — nC
Gate Plateau Voltage Vplateau — 4.9 — V
Drain-Source Diode Characteristics (7)
Parameter Symbol Test Condition Min. Typ. Max. Unit
Body Diode Reverse Recovery Time trr IF = 80A, dI/dt = 100A/µs, TJ = 25°C — 90 — ns
Body Diode Reverse Recovery Charge Qrr — 211 — nC
Diode Forward Current IS TC = 25°C — — 363 A

Notes:

  1. This current is chip limited, which is calculated based on Rthjc.
  2. This current is calculated on single pulse with 10us Single Pulse.
  3. Defined by design, not subject to production test, EAS condition: TJ=25°C, VDD=60V, VGS=10V, L=1.0mH.
  4. Device mounted on FR-4 substrate PC board with 2oz copper in 1inch square cooling area.
  5. Thermal resistance from junction to the exposed pad.
  6. Short duration pulse test used to minimize self-heating effect.
  7. Defined by design, not subject to production.

Typical Electrical and Thermal Characteristics

（曲线图略）

  • Figure 1: Output Characteristics（ID vs. VDS，VGS = 4.5V / 5.0V / 5.5V / 6.0V / 7.0V / 8.0V / 10V）
  • Figure 2: Transfer Characteristics（ID vs. VGS，VDS = 3.0V，TJ = 25°C / 175°C）
  • Figure 3: On-Resistance vs. Gate-Source Voltage（RDS(on) vs. VGS，ID = 80A，TJ = 25°C / 175°C）
  • Figure 4: On-Resistance vs. Drain Current and Gate Voltage（RDS(on) vs. ID，TJ = 25°C）
  • Figure 5: On-Resistance vs. Junction Temperature（Normalized RDS(on) vs. TJ，VGS = 10V，ID = 80A）
  • Figure 6: Source-Drain Diode Forward Voltage（IS vs. VSD，VGS = 10V，TJ = 25°C / 175°C）
  • Figure 7: Gate Threshold Variation vs. Junction Temperature（VGS(th) vs. TJ，ID = 250µA / 1.0mA）
  • Figure 8: Gate Charge Characteristics（VGS vs. Qg，ID = 80A）
  • Figure 9: Capacitance Characteristics（CT vs. VDS，Ciss / Coss / Crss）
  • Figure 10: Power Derating（PD vs. TC）
  • Figure 11: Current Derating（ID vs. TC）
  • Figure 12: Safe Operating Area（ID vs. VDS，TJ(Max) = 175°C，TC = 25°C，pulse widths: 1.0µs / 10µs / 100µs / 1.0ms / 10ms / 100ms / DC）
  • Figure 13: Normalized Maximum Transient Thermal Impedance（r(t) vs. Pulse Width，δ = 0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse；1. Duty cycle δ = t₁ / t₂；2. R_θJC(t) = r(t) × R_θJC）

TOLL Package Outline

Package Outline Dimensions (MILLIMETER)
DIM. MIN. NOM. MAX.
A 2.25 2.30 2.35
A1 1.00 1.04 1.08
A2 0.01 0.08 0.16
A3 — 1.50 REF —
b 0.73 0.75 0.79
b1 0.68 0.70 0.74
c 0.45 0.50 0.55
D 9.70 9.90 10.10
D1 — 9.25 REF —
D2 — 8.70 REF —
E 14.80 15.00 15.20
E1 10.00 10.10 10.30
E2 2.60 2.80 3.00
E3 — 5.77 REF —
e — 1.20 BSC —
H 5.00 5.20 5.40
H1 4.40 4.60 4.80
L 2.40 2.45 2.50
P 2.80 3.00 3.20

NOTES:

  1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
  2. ALL DIMENSIONS IN MILLIMETER (ANGLE IN DEGREE).
  3. DIMENSIONS "D" AND "E1" DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS.
Recommended Soldering Footprint (DIMENSIONS: MILLIMETERS)
Item Value
Horizontal span 17.75
Vertical span 14.37
Top/bottom pad width 1.200
Top/bottom pad pitch zone 4.200
Gate pad width 0.850 × 4
Source pad width 0.800 × 12
Vertical offset (gate/source rows) 7.187

（封装外形图及焊盘图略）

Rev. 1.0 | www.sinesemi.com | 中晶新源（上海）半导体有限公司

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