产品详情
SMT12T01AHTT2
中晶新源 SineSemi核心代理商
中低压 MOSFETTOLT
参数规格
- 封装
- TOLT
- 结构
- N
- 漏源电压 VDS
- 120 V
- 漏极电流 ID
- 363 A
- 导通电阻 RDS(ON)@10V 最大
- 1.8 mΩ
- 车规 (Y/N)
- N
- 阈值电压 VGS(th) 典型
- 3 V
- 导通电阻 RDS(ON)@10V 典型
- 1.4 mΩ
- 栅源电压 VGS 最大
- ±20 V
- 结温 Tj
- 175 °C
- 雪崩能量 EAS 最大
- 2560 mJ
- 输入电容 Ciss 典型
- 12205 pF
- 输出电容 Coss 典型
- 2542 pF
- 反向传输电容 Crss 典型
- 69 pF
- 总栅极电荷 Qg 典型
- 156 nC
- ESD
- No
- 最小包装量
- 1300 pcs
- 最小订购量
- 3900 pcs
- 应用推荐-马达驱动
- Y
- 应用推荐-高频电源
- Y
- 应用推荐-通用开关
- Y
封装与电路符号
封装外形 · 引脚配置 · 电路符号（源自中晶新源官方 datasheet）在线规格书
以下内容整理自原厂规格书，实际参数以原厂正式文件为准。
SMT12T01AHTT2
120V N-Channel Power MOSFET
Product Summary
| V_DS |
R_DS(ON)_TYP |
I_D_MAX |
| 120 V |
1.4 mΩ @V_GS = 10V |
363 A |
TOLT
Features
- Low On-Resistance
- Excellent FoM (figure of merit)
- 100% ΔVDS & UIS & Rg Tested
Applications
- High-Performance Power Supplies
- Motor Drives
- Hard Switching and High Speed Circuit
Mechanical Data
- Green Molding Compound
- Moisture Sensitivity: Level 1 per J-STD-020
- UL Flammability Classification Rating 94V-0
Ordering Information
| Orderable Part Number |
Package Type |
Device Marking |
Form |
Quantity (pcs) |
| SMT12T01AHTT2 |
TOLT |
12T01AH2 |
13" Tape&Reel |
2,000 |
Maximum Ratings (@ T_C = 25°C, unless otherwise specified.)
| Parameter |
Symbol |
Value |
Unit |
| Drain - Source Voltage |
V_DS |
120 |
V |
| Gate - Source Voltage |
V_GS |
±20 |
V |
| Continuous Drain Current (V_GS = 10V) ^(1) |
I_D @ T_C = 25°C |
363 |
A |
|
I_D @ T_C = 100°C |
257 |
A |
| Pulsed Drain Current ^(2) |
I_DM |
1378 |
A |
| Single Pulse Avalanche Energy ^(3) |
E_AS |
2560 |
mJ |
| Single Pulse Avalanche Current (L = 0.3mH) |
I_AS |
88 |
A |
| Power Dissipation |
P_D @ T_C = 25°C |
455 |
W |
|
P_D @ T_C = 100°C |
227 |
W |
| Junction & Storage Temperature Range |
T_J, T_STG |
-55 ~ +175 |
°C |
Thermal Characteristics
| Parameter |
Symbol |
Typ. |
Max. |
Unit |
| Thermal Resistance, Junction-to-Ambient ^(4) |
R_θJA |
30 |
40 |
°C/W |
| Thermal Resistance, Junction-to-Case ^(5) |
R_θJC |
0.25 |
0.33 |
°C/W |
Electrical Characteristics (@ T_J = 25°C, unless otherwise specified.)
Off Characteristics ^(6)
| Parameter |
Symbol |
Test Condition |
Min. |
Typ. |
Max. |
Unit |
| Drain-Source Breakdown Voltage |
V_(BR)DSS |
V_GS = 0V, I_D = 250µA |
120 |
— |
— |
V |
| Zero Gate Voltage Drain Current |
I_DSS |
V_DS = 120V, V_GS = 0V |
— |
— |
1.0 |
µA |
|
|
T_J = 125°C |
— |
— |
100 |
µA |
| Gate-Source Leakage Current |
I_GSS |
V_GS = ±20V, V_DS = 0V |
— |
— |
±100 |
nA |
On Characteristics ^(6)
| Parameter |
Symbol |
Test Condition |
Min. |
Typ. |
Max. |
Unit |
| Gate Threshold Voltage |
V_GS(th) |
V_GS = V_DS, I_D = 250µA |
2.0 |
3.0 |
4.0 |
V |
| Static Drain-Source On-Resistance |
R_DS(ON) |
V_GS = 10V, I_D = 80A |
— |
1.4 |
1.8 |
mΩ |
| Forward Transconductance |
g_fs |
V_DS = 5.0V, I_D = 20A |
— |
75 |
— |
S |
| Diodes Forward Voltage |
V_SD |
I_S = 2.0A, V_GS = 0V |
— |
0.7 |
1.2 |
V |
Dynamic Characteristics ^(7)
| Parameter |
Symbol |
Test Condition |
Min. |
Typ. |
Max. |
Unit |
| Input Capacitance |
C_iss |
|
— |
12205 |
— |
pF |
| Output Capacitance |
C_oss |
V_DS = 60V, V_GS = 0V, f = 1MHz |
— |
2542 |
— |
pF |
| Reverse Transfer Capacitance |
C_rss |
|
— |
69 |
— |
pF |
| Gate Resistance |
R_g |
V_GS = 0V, V_DS = 0V, f = 1MHz |
— |
1.4 |
— |
Ω |
Switching Characteristics ^(7)
| Parameter |
Symbol |
Test Condition |
Min. |
Typ. |
Max. |
Unit |
| Turn-On Delay Time |
t_d(on) |
|
— |
29 |
— |
ns |
| Rise Time |
t_r |
V_GS = 10V, V_DS = 60V |
— |
43 |
— |
ns |
| Turn-Off Delay Time |
t_d(off) |
I_D = 80A, R_GEN = 3.0Ω |
— |
68 |
— |
ns |
| Fall Time |
t_f |
|
— |
41 |
— |
ns |
Gate Charge Characteristics ^(7)
| Parameter |
Symbol |
Test Condition |
Min. |
Typ. |
Max. |
Unit |
| Total Gate Charge (V_GS = 10V) |
Q_g |
|
— |
156 |
— |
nC |
| Total Gate Charge (V_GS = 7.0V) |
Q_g |
V_DS = 60V, I_D = 80A |
— |
113 |
— |
nC |
| Gate-Source Charge |
Q_gs |
V_GS = 10V |
— |
54 |
— |
nC |
| Gate-Drain Charge |
Q_gd |
|
— |
29 |
— |
nC |
| Gate Plateau Voltage |
V_plateau |
|
— |
4.9 |
— |
V |
Drain-Source Diode Characteristics ^(7)
| Parameter |
Symbol |
Test Condition |
Min. |
Typ. |
Max. |
Unit |
| Body Diode Reverse Recovery Time |
t_rr |
I_F = 80A, dI/dt = 100A/µs, T_J = 25°C |
— |
90 |
— |
ns |
| Body Diode Reverse Recovery Charge |
Q_rr |
|
— |
211 |
— |
nC |
| Diode Forward Current |
I_S |
T_C = 25°C |
— |
— |
363 |
A |
Notes:
- This current is chip limited, which is calculated based on Rthjc.
- This current is calculated on single pulse with 10us Single Pulse.
- Defined by design, not subject to production test, E_AS condition: T_J=25°C, V_DD=60V, V_GS=10V, L=1.0mH.
- Device mounted on FR-4 substrate PC board with 2oz copper in 1inch square cooling area.
- Thermal resistance from junction to the exposed pad.
- Short duration pulse test used to minimize self-heating effect.
- Defined by design, not subject to production.
Typical Electrical and Thermal Characteristics
（曲线图略）
- Figure 1: Output Characteristics（I_D vs. V_DS，V_GS = 4.5V / 5.0V / 5.5V / 6.0V / 7.0V / 8.0V / 10V）
- Figure 2: Transfer Characteristics（I_D vs. V_GS，V_DS = 3.0V，T_J = 25°C / 175°C）
- Figure 3: On-Resistance vs. Gate-Source Voltage（R_DS(on) vs. V_GS，I_D = 80A，T_J = 25°C / 175°C）
- Figure 4: On-Resistance vs. Drain Current and Gate Voltage（R_DS(on) vs. I_D，T_J = 25°C）
- Figure 5: On-Resistance vs. Junction Temperature（Normalized R_DS(on) vs. T_J，V_GS = 10V，I_D = 80A）
- Figure 6: Source-Drain Diode Forward Voltage（I_S vs. V_SD，V_GS = 10V，T_J = 25°C / 175°C）
- Figure 7: Gate Threshold Variation vs. Junction Temperature（V_GS(th) vs. T_J，I_D = 250µA / 1.0mA）
- Figure 8: Gate Charge Characteristics（V_GS vs. Q_g，I_D = 80A）
- Figure 9: Capacitance Characteristics（C_T vs. V_DS，C_iss / C_oss / C_rss）
- Figure 10: Power Derating（P_D vs. T_C）
- Figure 11: Current Derating（I_D vs. T_C）
- Figure 12: Safe Operating Area（I_D vs. V_DS，T_J(Max) = 175°C，T_C = 25°C，pulse widths: 1.0µs / 10µs / 100µs / 1.0ms / 10ms / 100ms / DC）
- Figure 13: Normalized Maximum Transient Thermal Impedance（r(t) vs. Pulse Width，δ = 0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse；1. Duty cycle δ = t₁ / t₂；2. R_θJC(t) = r(t) × R_θJC）
TOLL Package Outline
Package Outline Dimensions (MILLIMETER)
| DIM. |
MIN. |
NOM. |
MAX. |
| A |
2.25 |
2.30 |
2.35 |
| A1 |
1.00 |
1.04 |
1.08 |
| A2 |
0.01 |
0.08 |
0.16 |
| A3 |
— |
1.50 REF |
— |
| b |
0.73 |
0.75 |
0.79 |
| b1 |
0.68 |
0.70 |
0.74 |
| c |
0.45 |
0.50 |
0.55 |
| D |
9.70 |
9.90 |
10.10 |
| D1 |
— |
9.25 REF |
— |
| D2 |
— |
8.70 REF |
— |
| E |
14.80 |
15.00 |
15.20 |
| E1 |
10.00 |
10.10 |
10.30 |
| E2 |
2.60 |
2.80 |
3.00 |
| E3 |
— |
5.77 REF |
— |
| e |
— |
1.20 BSC |
— |
| H |
5.00 |
5.20 |
5.40 |
| H1 |
4.40 |
4.60 |
4.80 |
| L |
2.40 |
2.45 |
2.50 |
| P |
2.80 |
3.00 |
3.20 |
NOTES:
- DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
- ALL DIMENSIONS IN MILLIMETER (ANGLE IN DEGREE).
- DIMENSIONS "D" AND "E1" DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS.
Recommended Soldering Footprint (DIMENSIONS: MILLIMETERS)
| Item |
Value |
| Horizontal span |
17.75 |
| Vertical span |
14.37 |
| Top/bottom pad width |
1.200 |
| Top/bottom pad pitch zone |
4.200 |
| Gate pad width |
0.850 × 4 |
| Source pad width |
0.800 × 12 |
| Vertical offset (gate/source rows) |
7.187 |
（封装外形图及焊盘图略）
Rev. 1.0 | www.sinesemi.com | 中晶新源（上海）半导体有限公司
