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SMP10T40ALUQ

中晶新源 SineSemi核心代理商

中低压 MOSFET车规TO252-3L

参数规格

封装
TO252-3L
结构
P
漏源电压 VDS
-100 V
漏极电流 ID
-32 A
导通电阻 RDS(ON)@10V 最大
40 mΩ
车规 (Y/N)
Y
阈值电压 VGS(th) 典型
-1.8 V
导通电阻 RDS(ON)@10V 典型
30 mΩ
导通电阻 RDS(ON)@4.5V 典型
36 mΩ
导通电阻 RDS(ON)@4.5V 最大
50 mΩ
栅源电压 VGS 最大
±20 V
结温 Tj
175 °C
雪崩能量 EAS 最大
160 mJ
输入电容 Ciss 典型
1402 pF
输出电容 Coss 典型
317 pF
反向传输电容 Crss 典型
14 pF
总栅极电荷 Qg 典型
23 nC

在线规格书

以下内容整理自原厂规格书,实际参数以原厂正式文件为准。

SMP10T40ALUQ

-100V P-Channel Enhancement Mode Power MOSFET

Sinesemi Automotive MOSFET — AEC-Q101 Qualified, PPAP Capable, 175°C Operating Temperature

Product Summary
VDS RDS(ON), max ID, max
-100 V 40 mΩ @ VGS = -10V -32 A
50 mΩ @ VGS = -4.5V

TO252-3L

Features
  • P-Channel Enhancement Mode - Logic Level
  • AEC-Q101 Qualified, PPAP Capable
  • 175°C Operating Temperature
  • 100% ∆VDS & UIS & Rg Tested
Application
  • General Automotive Applications
Mechanical Data
  • Green Molding Compound
  • Moisture Sensitivity: Level 1 per J-STD-020
  • UL Flammability Classification Rating 94V-0
Ordering Information
Orderable Part Number Package Type Device Marking Form Quantity (pcs)
SMP10T40ALUQ TO252-3L P10T40ALQ 13" Tape&Reel 2,500
Maximum Ratings (@ TA = 25°C, unless otherwise specified.)
Parameter Symbol Value Unit
Drain - Source Voltage VDS -100 V
Gate - Source Voltage VGS ±20 V
Continuous Drain Current (VGS = -10V) (1) ID TA = 25°C: -32 A
TA = 100°C: -22 A
Pulsed Drain Current (2) IDM -126 A
Single Pulse Avalanche Energy (3) EAS 160 mJ
Single Pulse Avalanche Current (L = 0.1mH) IAS -35 A
Power Dissipation PD TA = 25°C: 63 W
TA = 100°C: 42 W
Junction & Storage Temperature Range TJ, TSTG -55 ~ +175 °C
Thermal Characteristics
Parameter Symbol Typ Max Unit
Thermal Resistance, Junction-to-Ambient (4) R_θJA 30 38 °C/W
Thermal Resistance, Junction-to-Case (5) R_θJC 1.4 1.8 °C/W

Electrical Characteristics (@ TJ = 25°C, unless otherwise specified.)

Off Characteristics (7)
Parameter Symbol Test Condition Min Typ Max Unit
Drain-Source Breakdown Voltage V(BR)DSS VGS = 0V, ID = -250µA -100 V
Zero Gate Voltage Drain Current IDSS VDS = -100V, VGS = 0V -1.0 µA
TJ = 125°C -100 µA
Gate-Source Leakage Current IGSS VGS = ±20V, VDS = 0V ±100 nA
On Characteristics (7)
Parameter Symbol Test Condition Min Typ Max Unit
Gate Threshold Voltage VGS(th) VDS = VGS, ID = -250µA -1.2 -1.8 -2.5 V
Static Drain-Source On-Resistance RDS(on) VGS = -10V, ID = -15A 30 40
VGS = -4.5V, ID = -10A 36 50
Forward Transconductance gfs VDS = -5.0V, ID = -15A 30 S
Diodes Forward Voltage VSD IS = -2.0A, VGS = 0V -0.7 -1.2 V
Dynamic Characteristics (7)
Parameter Symbol Test Condition Min Typ Max Unit
Input Capacitance Ciss VDS = -50V, VGS = 0V, f = 1MHz 1402 1823 pF
Output Capacitance Coss 317 412 pF
Reverse Transfer Capacitance Crss 14 28 pF
Gate Resistance Rg VGS = 0V, VDS = 0V, f = 1MHz 5.4 Ω
Switching Characteristics (7)
Parameter Symbol Test Condition Min Typ Max Unit
Turn-On Delay Time td(on) VGS = -10V, VDS = -50V 5.7 ns
Rise Time tr ID = -15A, RGEN = 3.0Ω 14 ns
Turn-Off Delay Time td(off) 28 ns
Fall Time tf 26 ns
Gate Charge Characteristics (7)
Parameter Symbol Test Condition Min Typ Max Unit
Total Gate Charge (VGS = -10V) Qg VDS = -50V, ID = -15A 23 30 nC
Total Gate Charge (VGS = -4.5V) Qg 11 14.3 nC
Gate-Source Charge Qgs VGS = -10V 4.9 7.4 nC
Gate-Drain Charge Qgd 6.2 8.3 nC
Gate Plateau Voltage Vplateau -3.7 V
Drain-Source Diode Characteristics (7)
Parameter Symbol Test Condition Min Typ Max Unit
Body Diode Reverse Recovery Time trr IS = -15A, di/dt = 100A/µs 53 ns
Body Diode Reverse Recovery Charge Qrr TJ = 25°C 153 nC
Diode Forward Current IS TA = 25°C -32 A

Notes:

  1. This current is chip limited, which is calculated based on RθJC.
  2. This current is calculated on single pulse with 10µs Pulse & Duty Cycle = 1%.
  3. Defined by design, not subject to production test. TJ=25°C, VDS=-80V, VGS=-10V, L=1.0mH.
  4. Device mounted on FR-4 substrate PC board with 2oz copper in 1inch square cooling area.
  5. Thermal resistance from junction to soldering point (on the exposed drain pad).
  6. Short duration pulse test used to minimize self-heating effect.
  7. Defined by design; not subject to production.