Product Detail

SMT4501CHFP5

SineSemi 中晶新源Core Authorized Distributor

LV & MV MOSFETsLFPAK5060

Download Datasheet

Specifications

Package: LFPAK5060
Configuration: N
VDS_Max: 45 V
ID: 265 A
RDS(ON)_Max @VGS=10V: 1.15 mΩ
Automotive (Y/N): N
VGS(th)_Typ: 3 V
RDS(ON)_Typ @VGS=10V: 0.95 mΩ
VGS_Max: ±20 V
Tj: 150 °C
EAS_Max: 672 mJ
Ciss_Typ: 3936 pF
Coss_Typ: 2312 pF
Crss_Typ: 93 pF
Qg_Typ: 52 nC
ESD: No
MPQ: 5000 pcs
MOQ: 50000 pcs
App: Motor Drive: Y
App: HF Power: Y
App: Battery Protection: Y
App: General Switch: Y

Not sure how to choose? Read the LV & MV MOSFETs Selection Guide →

Package & Schematic

SMT4501CHFP5 package outline, pin configuration and schematic — Package outline · Pin configuration · Schematic (from SineSemi official datasheet)

Online Datasheet

Compiled from the manufacturer's datasheet; the official document prevails.

SMT4501CHFP5

45V N-Channel Power MOSFET

Product Summary

V_DS	R_DS(ON), max	I_D, max
45 V	1.15 mΩ @ V_GS = 10V	265 A

LFPAK5060

Maximum Ratings (@ T_A = 25°C, unless otherwise specified.)

Parameter	Symbol	Value	Units
Drain - Source Voltage	V_DS	45	V
Gate - Source Voltage	V_GS	±20	V
Continuous Drain Current (V_GS = 10V) ⁽¹⁾	I_D @ T_A = 25°C	265	A
	I_D @ T_C = 100°C	167	A
Pulsed Drain Current ⁽²⁾	I_DM	1058	A
Single Pulse Avalanche Energy ⁽³⁾	E_AS	672	mJ
Single Pulse Avalanche Current (L = 0.1mH)	I_AS	66	A
Power Dissipation	P_D @ T_A = 25°C	128	W
	P_D @ T_C = 100°C	51	W
Junction & Storage Temperature Range	T_J, T_STG	-55~+150	°C

Thermal Characteristics

Parameter	Symbol	Typ	Max	Unit
Thermal Resistance, Junction-to-Ambient ⁽⁴⁾	R_θJA	32	40	°C/W
Thermal Resistance, Junction-to-Case ⁽⁵⁾	R_θJC	0.75	0.98	°C/W

Electrical Characteristics (@ T_J = 25°C, unless otherwise specified.)

Off Characteristics

Parameter	Symbol	Test Condition	Min	Typ	Max	Units
Drain-Source Breakdown Voltage	V_(BR)DSS	V_GS = 0V, I_D = 250µA	45	—	—	V
		V_DS = 45V, V_GS = 0V	—	—	1.0	µA
Zero Gate Voltage Drain Current	I_DSS	T_J = 125°C	—	—	100	µA
Gate-Source Leakage Current	I_GSS	V_GS = ±20V, V_DS = 0V	—	—	±100	nA

On Characteristics

Parameter	Symbol	Test Condition	Min	Typ	Max	Units
Gate Threshold Voltage	V_GS(th)	V_GS = V_DS, I_D = 250µA	2.0	—	4.0	V
Static Drain-Source On-Resistance	R_DS(on)	V_GS = 10V, I_D = 20A	—	0.95	1.15	mΩ
Forward Transconductance	g_fs	V_DS = 5.0V, I_D = 20A	—	57	—	S
Diodes Forward Voltage	V_SD	I_S = 2.0A, V_GS = 0V	—	0.7	1.2	V

Dynamic Characteristics

Parameter	Symbol	Test Condition	Min	Typ	Max	Units
Input Capacitance	C_iss		—	3936	—	pF
Output Capacitance	C_oss	V_DS = 20V, V_GS = 0V, f = 1MHz	—	2312	—	pF
Reverse Transfer Capacitance	C_rss		—	93	—	pF
Gate Resistance	R_g	V_GS = 0V, V_DS = 0V, f = 1MHz	—	1.8	—	Ω

Switching Characteristics

Parameter	Symbol	Test Condition	Min	Typ	Max	Units
Turn-On Delay Time	t_d(on)		—	8.2	—	ns
Rise Time	t_r	V_DS = 20V, V_GS = 20V	—	18	—	ns
Turn-Off Delay Time	t_d(off)	I_D = 20A, R_GEN = 3.0Ω	—	29	—	ns
Fall Time	t_f		—	17	—	ns

Gate Charge Characteristics

Parameter	Symbol	Test Condition	Min	Typ	Max	Units
Total Gate Charge (V_GS = 10V)	Q_g		—	52	—	nC
Gate-Source Charge	Q_gs	V_DS = 20V, I_D = 20A	—	15.9	—	nC
Gate-Drain Charge	Q_gd		—	9.3	—	nC
Gate Plateau Voltage	V_plateau		—	4.5	—	V

Drain-Source Diode Characteristics

Parameter	Symbol	Test Condition	Min	Typ	Max	Units
Body Diode Reverse Recovery Time	t_rr	I_S = 20A, di/dt = 100A/µs	—	59	—	ns
Body Diode Reverse Recovery Charge	Q_rr	T_J = 25°C	—	70	—	nC
Diode Forward Current	I_S	T_J = 25°C	—	—	181	A

Notes:

This current is chip limited, which is calculated based on Rθjc.
This current is calculated on single pulse with 10µs Pulse & Duty Cycle = 1%.
Defined by design; not subject to production test.
Device mounted on FR4 substrate PC board with 2oz copper on 1inch square cooling area.
Thermal resistance from junction to the exposed pad.
Short duration pulse test used to minimize self-heating effect.
Defined by design, not subject to production.