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SMP15T50ALP

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中低压 MOSFETPDFN5060-8L

参数规格

封装
PDFN5060-8L
结构
P
漏源电压 VDS
-150 V
漏极电流 ID
-35 A
导通电阻 RDS(ON)@10V 最大
50 mΩ
车规 (Y/N)
N
阈值电压 VGS(th) 典型
-1.6 V
导通电阻 RDS(ON)@10V 典型
36 mΩ
导通电阻 RDS(ON)@4.5V 典型
40 mΩ
导通电阻 RDS(ON)@4.5V 最大
60 mΩ
栅源电压 VGS 最大
±20 V
结温 Tj
150 °C
雪崩能量 EAS 最大
578 mJ
输入电容 Ciss 典型
4409 pF
输出电容 Coss 典型
1126 pF
反向传输电容 Crss 典型
37 pF
总栅极电荷 Qg 典型
61 nC
ESD
No
最小包装量
5000 pcs
最小订购量
50000 pcs
应用推荐-马达驱动
Y
应用推荐-高频电源
Y
应用推荐-通用开关
Y

不确定怎么选？阅读《中低压 MOSFET 选型指南》 →

在线规格书

以下内容整理自原厂规格书，实际参数以原厂正式文件为准。

SMP15T50ALP

-150V P-Channel Enhancement Mode Power MOSFET

Product Summary
VDS RDS(ON)_TYP I_D_MAX
-150 V 36 mΩ @VGS = -10V -35 A
40 mΩ @VGS = -4.5V
Features
  • Low On-Resistance
  • Excellent FoM (figure of merit)
  • 100% ΔVDS & UIS & Rg tested
Applications
  • Motor control
  • Load switch
  • Reverse polarity protection
Mechanical Data
  • Green molding compound
  • Moisture sensitivity: level 1 per J-STD-020
  • UL flammability classification rating 94V-0

PDFN5060-8L

PIN Configuration (Top View): D D D D / S S S G

Ordering Information
Orderable Part Number Package Type Device Marking Form Quantity (pcs)
SMP15T50ALP PDFN5060-8L P15T50AL 13" Tape&Reel 5,000
Maximum Ratings (@ TC = 25°C, unless otherwise specified.)
Parameter Symbol Value Unit
Drain - Source Voltage VDS -150 V
Gate - Source Voltage VGS ±20 V
Continuous Drain Current (VGS = -10V) (1) ID @ TC = 25°C -35 A
ID @ TC = 100°C -22 A
Pulsed Drain Current (2) IDM -139 A
Single Pulse Avalanche Energy (3) EAS 578 mJ
Single Pulse Avalanche Current (L = 0.1mH) IAS -27 A
Power Dissipation PD @ TC = 25°C 125 W
PD @ TC = 100°C 50 W
Junction & Storage Temperature Range TJ, TSTG -55 ~ +150 °C
Thermal Characteristics
Parameter Symbol Typ. Max. Unit
Thermal Resistance, Junction-to-Ambient (4) R_θJA 35 43 °C/W
Thermal Resistance, Junction-to-Case (5) R_θJC 0.80 1.0 °C/W

Electrical Characteristics (@ TJ = 25°C, unless otherwise specified.)

Off Characteristics (6)
Parameter Symbol Test Condition Min. Typ. Max. Unit
Drain-Source Breakdown Voltage V(BR)DSS VGS = 0V, ID = -250µA -150 — — V
Zero Gate Voltage Drain Current IDSS VDS = -150V, VGS = 0V — — -1.0 µA
TJ = 125°C — — -100 µA
Gate-Source Leakage Current IGSS VGS = ±20V, VDS = 0V — — ±100 nA
On Characteristics (6)
Parameter Symbol Test Condition Min. Typ. Max. Unit
Gate Threshold Voltage VGS(th) VGS = VDS, ID = -250µA -1.0 -1.6 -2.5 V
Static Drain-Source On-Resistance RDS(ON) VGS = -10V, ID = -15A — 36 50 mΩ
VGS = -4.5V, ID = -10A — 40 60 mΩ
Forward Transconductance gfs VDS = -5.0V, ID = -15A — 34 — S
Diodes Forward Voltage VSD IS = -2.0A, VGS = 0V — -0.7 -1.2 V
Dynamic Characteristics (7)
Parameter Symbol Test Condition Min. Typ. Max. Unit
Input Capacitance Ciss VDS = -75V, VGS = 0V, f = 1MHz — 4409 — pF
Output Capacitance Coss VDS = -75V, VGS = 0V, f = 1MHz — 1126 — pF
Reverse Transfer Capacitance Crss VDS = -75V, VGS = 0V, f = 1MHz — 37 — pF
Gate Resistance Rg VGS = 0V, VDS = 0V, f = 1MHz — 7.2 — Ω
Switching Characteristics (7)
Parameter Symbol Test Condition Min. Typ. Max. Unit
Turn-On Delay Time td(on) VGS = -10V, VDS = -75V — 5.7 — ns
Rise Time tr ID = -15A, RGEN = 3.0Ω — 10 — ns
Turn-Off Delay Time td(off) — 111 — ns
Fall Time tf — 16 — ns
Gate Charge Characteristics (7)
Parameter Symbol Test Condition Min. Typ. Max. Unit
Total Gate Charge (VGS = -10V) Qg VDS = -75V, ID = -15A — 61 — nC
Total Gate Charge (VGS = -4.5V) Qg VGS = -10V — 28 — nC
Gate-Source Charge Qgs — 11.6 — nC
Gate-Drain Charge Qgd — 6.9 — nC
Gate Plateau Voltage Vplateau — -2.9 — V
Drain-Source Diode Characteristics (7)
Parameter Symbol Test Condition Min. Typ. Max. Unit
Body Diode Reverse Recovery Time trr IF = -15A, dI/dt = 100A/µs, TJ = 25°C — 78 — ns
Body Diode Reverse Recovery Charge Qrr TJ = 25°C — 329 — nC
Diode Forward Current IS TC = 25°C — — -35 A

Notes:

  1. This current is chip limited, which is calculated based on Rthjc.
  2. This current is calculated on single pulse with 10µs Pulse.
  3. Defined by design; not subject to production test. EAS condition: TJ = 25°C, VDD = -75V, VGS = -10V, L = 1.0mH.
  4. Device mounted on FR-4 substrate PC board with 2oz copper in 1inch square cooling area.
  5. Thermal resistance from junction to the exposed pad.
  6. Short duration pulse test used to minimize self-heating effect.
  7. Defined by design, not subject to production.

Typical Electrical and Thermal Characteristics

  • Figure 1: Output Characteristics（曲线图略）
  • Figure 2: Transfer Characteristics（曲线图略）
  • Figure 3: On-Resistance vs. Gate-Source Voltage（曲线图略）
  • Figure 4: On-Resistance vs. Drain Current and Gate Voltage（曲线图略）
  • Figure 5: On-Resistance vs. Junction Temperature（曲线图略）
  • Figure 6: Source-Drain Diode Forward Voltage（曲线图略）
  • Figure 7: Gate Threshold Variation vs. Junction Temperature（曲线图略）
  • Figure 8: Gate Charge Characteristics（曲线图略）
  • Figure 9: Capacitance Characteristics（曲线图略）
  • Figure 10: Power Derating（曲线图略）
  • Figure 11: Current Derating（曲线图略）
  • Figure 12: Safe Operating Area（曲线图略）
  • Figure 13: Normalized Maximum Transient Thermal Impedance（曲线图略）

Figure 13 注：δ = 0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse；1. Duty cycle δ = t1 / t2；2. R_θJC(t) = r(t) × R_θJC

PDFN5060-8L Package Outline

Notes:

  1. Dimensioning and tolerancing per ASME Y14.5M, 1994.
  2. All dimensions in millimeter (angle in degree).
  3. Dimensions D1 and E1 do not include mold flash protrusions or gate burrs.
DIM. MIN. NOM. MAX.
A 0.90 1.05 1.20
b 0.20 0.41 0.51
c 0.20 0.25 0.35
D 4.80 — 5.40
D1 4.65 — 5.30
D2 3.60 — 4.30
E 5.90 — 6.30
E1 5.60 — 6.00
E2 3.37 — 3.92
e 1.27BSC
H 0.40 0.60 0.75
L 0.40 0.60 0.84
θ 0° — 12°

Dimensions in millimeters.

Recommended Soldering Footprint (dimensions in millimeters):

Dimension Value
Overall width 6.610
Inner width 3.574
Pad width 4.504
Pad length 4.300
Pin pitch 1.270
Pin offset 0.610
Pin width 1.270

Rev. 1.1

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