SMP6050ALU product image

Product Detail

SMP6050ALU

SineSemi 中晶新源Core Authorized Distributor

LV & MV MOSFETsTO252-3L
Download Datasheet

Specifications

Package
TO252-3L
Configuration
P
VDS_Max
-60 V
ID
-25 A
RDS(ON)_Max @VGS=10V
50 mΩ
Automotive (Y/N)
N
VGS(th)_Typ
-1.8 V
RDS(ON)_Typ @VGS=10V
36 mΩ
RDS(ON)_Typ @VGS=4.5V
48 mΩ
RDS(ON)_Max @VGS=4.5V
65 mΩ
VGS_Max
±20 V
Tj
150 °C
EAS_Max
68 mJ
Ciss_Typ
668 pF
Coss_Typ
222 pF
Crss_Typ
12 pF
Qg_Typ
11.8 nC
ESD
No
MPQ
2500 pcs
MOQ
25000 pcs
App: Motor Drive
Y
App: HF Power
Y
App: General Switch
Y

Package & Schematic

SMP6050ALU package outline, pin configuration and schematic
Package outline · Pin configuration · Schematic (from SineSemi official datasheet)

Online Datasheet

Compiled from the manufacturer's datasheet; the official document prevails.

SMP6050ALU

-60V P-Channel Enhancement Mode Power MOSFET

Product Summary
V_DS R_DS(ON), max I_D, max
-60 V 50 mΩ @ V_GS = -10V -25 A
65 mΩ @ V_GS = -4.5V

TO252-3L

Features
  • P-Channel Enhancement Mode - Logic Level
  • Excellent FoM (figure of merit)
  • 100% UIS and Rg Tested
Application
  • Motor drives
  • Load Switch
  • Reverse Polarity Protection
Ordering Information
Orderable Part Number Package Type Device Marking Form Quantity (pcs)
SMP6050ALU TO252-3L P6050AL 13'' Tape&Reel 2,500
Maximum Ratings (@ T_C = 25°C, unless otherwise specified.)
Parameter Symbol Value Unit
Drain - Source Voltage V_DS -60 V
Gate - Source Voltage V_GS ±20 V
Continuous Drain Current (V_GS = -10V) ^(1) I_D T_C = 25°C: -25 A
T_C = 100°C: -15.6 A
Pulsed Drain Current ^(2) I_DM -98 A
Single Pulse Avalanche Energy ^(3) E_AS 68 mJ
Single Pulse Avalanche Current (L = 0.1mH) I_AS -21 A
Power Dissipation P_D T_C = 25°C: 50 W
T_C = 100°C: 20 W
Junction & Storage Temperature Range T_J, T_STG -55 ~ +150 °C
Thermal Characteristics
Parameter Symbol Typ Max Unit
Thermal Resistance, Junction-to-Ambient ^(4) R_θJA 52 65 °C/W
Thermal Resistance, Junction-to-Case ^(5) R_θJC 1.9 2.5 °C/W

Electrical Characteristics (@ T_J = 25°C, unless otherwise specified.)

Off Characteristics ^(6)
Parameter Symbol Test Condition Min Typ Max Unit
Drain-Source Breakdown Voltage V_(BR)DSS V_GS = 0V, I_D = -250µA -60 V
Zero Gate Voltage Drain Current I_DSS V_DS = -60V, V_GS = 0V -1.0 µA
T_J = 125°C -100 µA
Gate-Source Leakage Current I_GSS V_GS = ±20V, V_DS = 0V ±100 nA
On Characteristics ^(6)
Parameter Symbol Test Condition Min Typ Max Unit
Gate Threshold Voltage V_GS(th) V_DS = V_GS, I_D = -250µA -1.2 -1.8 -2.5 V
Static Drain-Source On-Resistance R_DS(on) V_GS = -10V, I_D = -7.0A 36 50
V_GS = -4.5V, I_D = -5.0A 48 65
Forward Transconductance g_fs V_DS = -5.0V, I_D = -7.0A 17 S
Diodes Forward Voltage V_SD I_S = -2.0A, V_GS = 0V -0.7 -1.2 V
Dynamic Characteristics ^(7)
Parameter Symbol Test Condition Min Typ Max Unit
Input Capacitance C_iss V_DS = -30V, V_GS = 0V, f = 1MHz 668 pF
Output Capacitance C_oss 222 pF
Reverse Transfer Capacitance C_rss 12 pF
Gate Resistance R_g V_GS = 0V, V_DS = 0V, f = 1MHz 8.6 Ω
Switching Characteristics ^(7)
Parameter Symbol Test Condition Min Typ Max Unit
Turn-On Delay Time t_d(on) V_GS = -10V, V_DS = -30V 5.5 ns
Rise Time t_r I_D = -7.0A, R_GEN = 3.0Ω 3.6 ns
Turn-Off Delay Time t_d(off) 21 ns
Fall Time t_f 9.1 ns
Gate Charge Characteristics ^(7)
Parameter Symbol Test Condition Min Typ Max Unit
Total Gate Charge (V_GS = -10V) Q_g V_DS = -30V, I_D = -7.0A 11.8 nC
Total Gate Charge (V_GS = -4.5V) Q_g 5.3 nC
Gate-Source Charge Q_gs V_GS = -10V 1.8 nC
Gate-Drain Charge Q_gd 1.6 nC
Gate Plateau Voltage V_plateau -2.9 V
Drain-Source Diode Characteristics ^(7)
Parameter Symbol Test Condition Min Typ Max Unit
Body Diode Reverse Recovery Time t_rr I_S = -7.0A, di/dt = 100A/µs 25 ns
Body Diode Reverse Recovery Charge Q_rr T_J = 25°C 18 nC
Diode Forward Current I_S T_C = 25°C -25 A

Notes:

  1. This current is chip limited, which is calculated based on RθJC.
  2. This current is calculated on single pulse with 10µs Pulse.
  3. Defined by design, not subject to production test.
  4. Device mounted on FR-4 substrate PC board with 2oz copper in 1inch square cooling area.
  5. Thermal resistance from junction to the exposed pad.
  6. Short duration pulse test used to minimize self-heating effect.
  7. Defined by design, not subject to production.