SMT10T15ALP product image

Product Detail

SMT10T15ALP

SineSemi 中晶新源Core Authorized Distributor

LV & MV MOSFETsPDFN5060-8L
Download Datasheet

Specifications

Package
PDFN5060-8L
Configuration
N
VDS_Max
100 V
ID
45 A
RDS(ON)_Max @VGS=10V
15.9 mΩ
Automotive (Y/N)
N
VGS(th)_Typ
1.7 V
RDS(ON)_Typ @VGS=10V
13.3 mΩ
RDS(ON)_Typ @VGS=4.5V
15.6 mΩ
RDS(ON)_Max @VGS=4.5V
19.5 mΩ
VGS_Max
±20 V
Tj
150 °C
EAS_Max
90 mJ
Ciss_Typ
745 pF
Coss_Typ
331 pF
Crss_Typ
8.5 pF
Qg_Typ
13 nC
ESD
No
MPQ
5000 pcs
MOQ
50000 pcs
App: HF Power
Y
App: Battery Protection
Y
App: General Switch
Y

Package & Schematic

SMT10T15ALP package outline, pin configuration and schematic
Package outline · Pin configuration · Schematic (from SineSemi official datasheet)

Online Datasheet

Compiled from the manufacturer's datasheet; the official document prevails.

SMT10T15ALP

100V N-Channel Power MOSFET

Product Summary
V_DS R_DS(ON), max I_D, max
100 V 15.9 mΩ @ V_GS = 10V 45 A
19.5 mΩ @ V_GS = 4.5V

PDFN5060-8L

Maximum Ratings (@ T_C = 25°C, unless otherwise specified.)
Parameter Symbol Value Unit
Drain - Source Voltage V_DS 100 V
Gate - Source Voltage V_GS ±20 V
Continuous Drain Current (V_GS = 10V) ^(1) I_D T_C = 25°C: 45 A
T_C = 100°C: 28 A
Pulsed Drain Current ^(2) I_DM 178 A
Single Pulse Avalanche Energy ^(3) E_AS 90 mJ
Single Pulse Avalanche Current (L = 0.1mH) I_AS 19 A
Power Dissipation P_D T_C = 25°C: 60 W
T_C = 100°C: 24 W
Junction & Storage Temperature Range T_J, T_STG -55~+150 °C
Thermal Characteristics
Parameter Symbol Typ Max Unit
Thermal Resistance, Junction-to-Ambient ^(4) R_θJA 38 48 °C/W
Thermal Resistance, Junction-to-Case ^(5) R_θJC 1.6 2.1 °C/W

Electrical Characteristics (@ T_J = 25°C, unless otherwise specified.)

Off Characteristics
Parameter Symbol Test Condition Min Typ Max Unit
Drain-Source Breakdown Voltage V_(BR)DSS V_GS = 0V, I_D = 250µA 100 — — V
Zero Gate Voltage Drain Current I_DSS V_DS = 100V, V_GS = 0V — — 1.0 µA
T_J = 125°C — — 100 µA
Gate-Source Leakage Current I_GSS V_GS = ±20V, V_DS = 0V — — ±100 nA
On Characteristics
Parameter Symbol Test Condition Min Typ Max Unit
Gate Threshold Voltage V_GS(th) V_GS = V_DS, I_D = 250µA 1.2 1.7 2.5 V
Static Drain-Source On-Resistance R_DS(on) V_GS = 10V, I_D = 20A — 13.3 15.9 mΩ
V_GS = 4.5V, I_D = 15A — 15.6 19.5 mΩ
Forward Transconductance g_fs V_DS = 5.0V, I_D = 20A — 26 — S
Diodes Forward Voltage V_SD I_S = 2.0A, V_GS = 0V — 0.7 1.2 V
Dynamic Characteristics
Parameter Symbol Test Condition Min Typ Max Unit
Input Capacitance C_iss V_DS = 50V, V_GS = 0V, f = 1MHz — 745 — pF
Output Capacitance C_oss — 331 — pF
Reverse Transfer Capacitance C_rss — 8.5 — pF
Gate Resistance R_g V_GS = 0V, V_DS = 0V, f = 1MHz — 1.2 — Ω
Switching Characteristics
Parameter Symbol Test Condition Min Typ Max Unit
Turn-On Delay Time t_d(on) V_GS = 10V, V_DS = 50V — 2.9 — ns
Rise Time t_r I_D = 20A, R_GEN = 3.0Ω — 3.0 — ns
Turn-Off Delay Time t_d(off) — 12.2 — ns
Fall Time t_f — 4.9 — ns
Gate Charge Characteristics
Parameter Symbol Test Condition Min Typ Max Unit
Total Gate Charge (V_GS = 10V) Q_g V_DS = 50V, I_D = 20A — 13.0 — nC
Total Gate Charge (V_GS = 4.5V) Q_g — 6.6 — nC
Gate-Source Charge Q_gs — 2.2 — nC
Gate-Drain Charge Q_gd — 2.8 — nC
Gate Plateau Voltage V_plateau — 3.2 — V
Drain-Source Diode Characteristics
Parameter Symbol Test Condition Min Typ Max Unit
Body Diode Reverse Recovery Time t_rr I_S = 20A, di/dt = 100 A/µs — 44 — ns
Body Diode Reverse Recovery Charge Q_rr T_J = 25°C — 27 — nC
Diode Forward Current I_S T_C = 25°C — — 45 A

Notes:

  1. This current is chip limited, which is calculated based on Rthjc.
  2. This current is calculated on single pulse with 10us Single Pulse.
  3. Defined by design, not subject to production test, EAS condition: TJ=25°C, VDD=50V, VGS=10V, L=1.0mH.
  4. Device mounted on FR-4 substrate PC board with 2oz copper in 1inch square cooling area.
  5. Thermal resistance from junction to the exposed pad.
  6. Short duration pulse test used to minimize self-heating effect.
  7. Defined by design, not subject to production.
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