SMJ65R650ANU product image

Product Detail

SMJ65R650ANU

SineSemi 中晶新源Core Authorized Distributor

HV MOSFETsTO252-3L

Specifications

Package
TO252-3L
Tj
150 °C
VDS_Max
650 V
ID_Max
8 A
RDS(ON)_Typ @VGS=10V
580 mΩ
RDS(ON)_Max @VGS=10V
650 mΩ
VGS_Max
±30 V
EAS_Max
81 mJ
Ciss_Typ
406 pF
Coss_Typ
25 pF
Crss_Typ
1.18 pF
Qg_Typ
15 nC

Online Datasheet

Compiled from the manufacturer's datasheet; the official document prevails.

SMJ65R650ANU

650V Super Junction N-Channel Power MOSFET

Product Summary
VDS RDS(ON), max ID, max
650 V 650 mΩ @ VGS = 10V 8 A

TO252-3L

Features
  • Low On-Resistance
  • Fast Switching Capability
  • 100% UIS and Rg tested
  • RoHS compliant, HALOGEN FREE
Applications
  • AC/DC power supply
  • PC power
  • Telecom/Server
  • Solar invertor
Mechanical Data
  • Green Molding Compound
  • Moisture Sensitivity: Level 3 per J-STD-020
  • UL Flammability Classification Rating 94V-0
Ordering Information
Orderable Part Number Package Type Device Marking Form Quantity (pcs)
SMJ65R650ANU TO252-3L 65R650A 13" Tape&Reel 2,500
Maximum Ratings (@ TA = 25°C, unless otherwise specified.)
Parameter Symbol Value Unit
Drain - Source Voltage VDS 650 V
Gate - Source Voltage VGS ±30 V
Continuous Drain Current (VGS = 10V) (1) ID TA = 25°C: 8.0 A
TA = 100°C: 5.0 A
Pulsed Drain Current (2) IDM 24 A
Single Pulse Avalanche Energy (3) EAS 81 mJ
Single Pulse Avalanche Current (L = 50.0mH) IAS 1.5 A
Power Dissipation PD TA = 25°C: 62.5 W
MOSFET dv/dt Ruggedness, VDS = 0...520V dv/dt 50
Reverse Diodes dv/dt, VDS = 0...400V, IDR < IS dv/dt 50
Junction & Storage Temperature Range TJ, TSTG -55 ~ +150 °C
Thermal Characteristics
Parameter Symbol Typ Max Unit
Thermal Resistance, Junction-to-Ambient (4) R_θJA 62 °C/W
Thermal Resistance, Junction-to-Case (5) R_θJC 2.0 °C/W

Electrical Characteristics (@ TJ = 25°C, unless otherwise specified.)

Off Characteristics (7)
Parameter Symbol Test Condition Min Typ Max Unit
Drain-Source Breakdown Voltage V(BR)DSS VGS = 0V, ID = 250µA 650 V
Zero Gate Voltage Drain Current IDSS VDS = 650V, VGS = 0V 1.0 µA
Gate-Source Leakage Current IGSS VGS = ±30V, VDS = 0V ±100 nA
On Characteristics (7)
Parameter Symbol Test Condition Min Typ Max Unit
Gate Threshold Voltage VGS(th) VDS = VGS, ID = 250µA 2.0 4.0 V
Static Drain-Source On-Resistance RDS(on) VGS = 10V, ID = 6.0A 580 650
Diodes Forward Voltage VSD IS = 6.0A, VGS = 0V 0.86 V
Dynamic Characteristics (7)
Parameter Symbol Test Condition Min Typ Max Unit
Input Capacitance Ciss VDS = 50V, VGS = 0V, f = 1.0MHz 406 pF
Output Capacitance Coss 25 pF
Reverse Transfer Capacitance Crss 1.18 pF
Effective Output Capacitance, Energy Related (8) Co(er) VDS = 0V... 16 pF
Effective Output Capacitance, Time Related (9) Co(tr) VDS = 0...400V 82 pF
Gate Resistance Rg VGS = 0V, VDS = 0V, f = 1.0MHz 3.8 Ω
Switching Characteristics (7)
Parameter Symbol Test Condition Min Typ Max Unit
Turn-On Delay Time td(on) VGS = 10V, VDS = 400V 26 ns
Rise Time tr ID = 4.0A 26 ns
Turn-Off Delay Time td(off) RG = 5Ω 40 ns
Fall Time tf 18 ns
Gate Charge Characteristics (7)
Parameter Symbol Test Condition Min Typ Max Unit
Total Gate Charge (VGS = 10V) Qg VDS = 480V, ID = 4.0A 15 nC
Gate-Source Charge Qgs 2.4 nC
Gate-Drain Charge Qgd VGS = 0...10V 9.0 nC
Gate Plateau Voltage Vplateau 3.6 V
Drain-Source Diode Characteristics (7)
Parameter Symbol Test Condition Min Typ Max Unit
Body Diode Reverse Recovery Time trr IS = 4.0A, di/dt = 100A/ns, VR = 480V 200 ns
Body Diode Reverse Recovery Charge Qrr TJ = 25°C 1.25 µC
Body Diode Reverse Recovery Current IRRM 14 A
Diode Forward Current IS TA = 25°C 8.0 A

Notes:

  1. This current is chip limited, which is calculated based on RθJC.
  2. This current is calculated on single pulse with 10µs Pulse & Duty Cycle = 1%.
  3. Defined by design, not subject to production test. TJ=25°C, VDS=400V, VGS=10V, L=30mH.
  4. Device mounted on FR-4 substrate PC board with 2oz copper in 1inch square cooling area.
  5. Thermal resistance from junction to soldering point (on the exposed drain pad).
  6. Short duration pulse test used to minimize self-heating effect.
  7. Defined by design; not subject to production.
  8. Co(er) is a fixed capacitance that gives the same stored energy as Coss while VDS is rising from 0 to 480V.
  9. Co(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 480V.