SMJ65R190CFT product image

Product Detail

SMJ65R190CFT

SineSemi 中晶新源Core Authorized Distributor

HV MOSFETsTO263-3L
Download Datasheet

Specifications

Automotive (Y/N)
N
Package
TO263-3L
Configuration
N
Tj
150 °C
VDS_Max
650 V
ID_Max
19 A
VGS(th)_Typ
3.8 V
RDS(ON)_Typ @VGS=10V
152 mΩ
RDS(ON)_Max @VGS=10V
190 mΩ
VGS_Max
±30 V
EAS_Max
210 mJ
Ciss_Typ
1110 pF
Coss_Typ
65 pF
Crss_Typ
0.8 pF
Qg_Typ
36 nC

Package & Schematic

SMJ65R190CFT package outline, pin configuration and schematic
Package outline · Pin configuration · Schematic (from SineSemi official datasheet)

Online Datasheet

Compiled from the manufacturer's datasheet; the official document prevails.

SMJ65R190CFT

650V Super Junction N-Channel Power MOSFET

Product Summary
V_DS R_DS(ON), max I_D, max
650 V 190 mΩ @ V_GS = 10V 19 A

TO263-3L

Features
  • Low On-Resistance
  • Fast Switching Capability
  • 100% ∆V/DS & UIS & R_G Tested
  • RoHS compliant, HALOGEN FREE
Applications
  • LED Lighting
  • Charger and Adapter
  • PC and Telecom Power
Mechanical Data
  • Green Molding Compound
  • Moisture Sensitivity: Level 3 per J-STD-020
  • UL Flammability Classification Rating 94V-0
Ordering Information
Orderable Part Number Package Type Device Marking Form Quantity (pcs)
SMJ65R190CFT TO263-3L 65R190CF 13'' Tape&Reel 800
Maximum Ratings (@ T_C = 25°C, unless otherwise specified.)
Parameter Symbol Value Unit
Drain - Source Voltage V_DS 650 V
Gate - Source Voltage V_GS ±30 V
Continuous Drain Current (V_GS = 10V) ^(1) I_D T_C = 25°C: 19 A
T_C = 100°C: 12 A
Pulsed Drain Current ^(2) I_DM 78 A
Single Pulse Avalanche Energy ^(3) E_AS 210 mJ
Single Pulse Avalanche Current (L = 10.0mH) I_AS 7.7 A
Power Dissipation P_D T_C = 25°C: 169 W
T_C = 100°C: 67.6 W
MOSFET dv/dt Ruggedness, V_DS = 0...400V dv/dt 50 V/ns
Reverse Diodes dv/dt, V_DS = 0...400V, I_SD ≤ I_D dv/dt 50 V/ns
Junction & Storage Temperature Range T_J, T_STG -55 ~ +150 °C
Thermal Characteristics
Parameter Symbol Typ Max Unit
Thermal Resistance, Junction-to-Ambient ^(4) R_θJA 52 65 °C/W
Thermal Resistance, Junction-to-Case ^(5) R_θJC 0.53 0.74 °C/W

Electrical Characteristics (@ T_J = 25°C, unless otherwise specified.)

Off Characteristics ^(6)
Parameter Symbol Test Condition Min Typ Max Unit
Drain-Source Breakdown Voltage V_(BR)DSS V_GS = 0V, I_D = 250µA 650 V
Zero Gate Voltage Drain Current I_DSS V_DS = 650V, V_GS = 0V 5.0 µA
T_J = 125°C 500 µA
Gate-Source Leakage Current I_GSS V_GS = ±30V, V_DS = 0V ±100 nA
On Characteristics ^(6)
Parameter Symbol Test Condition Min Typ Max Unit
Gate Threshold Voltage V_GS(th) V_DS = V_GS, I_D = 250µA 3.2 3.8 4.6 V
Static Drain-Source On-Resistance R_DS(on) V_GS = 10V, I_D = 10A 152 190
Diodes Forward Voltage V_SD I_S = 10A, V_GS = 0V 0.90 1.1 V
Dynamic Characteristics ^(7)
Parameter Symbol Test Condition Min Typ Max Unit
Input Capacitance C_iss V_DS = 400V, V_GS = 0V, f = 1MHz 1110 pF
Output Capacitance C_oss 65 pF
Reverse Transfer Capacitance C_rss 0.8 pF
Gate Resistance R_g V_GS = 0V, V_DS = 0V, f = 1MHz 13.0 Ω
Switching Characteristics ^(7)
Parameter Symbol Test Condition Min Typ Max Unit
Turn-On Delay Time t_d(on) V_GS = 10V, V_DS = 400V 46 ns
Rise Time t_r I_D = 17A, R_GEN = 27Ω 61 ns
Turn-Off Delay Time t_d(off) 120 ns
Fall Time t_f 34 ns
Gate Charge Characteristics ^(7)
Parameter Symbol Test Condition Min Typ Max Unit
Total Gate Charge (V_GS = 10V) Q_g V_DS = 480V, I_D = 10A, V_GS = 10V 36 nC
Total Gate Charge (V_GS = 8.0V) Q_g 32 nC
Gate-Source Charge Q_gs 10 nC
Gate-Drain Charge Q_gd 20 nC
Gate Plateau Voltage V_plateau 7.7 V
Drain-Source Diode Characteristics ^(7)
Parameter Symbol Test Condition Min Typ Max Unit
Body Diode Reverse Recovery Time t_rr I_S = 17A, di/dt = 100A/µs, T_J = 25°C 95 ns
Body Diode Reverse Recovery Charge Q_rr 0.3 µC
Diode Forward Current I_S T_C = 25°C 19 A

Notes:

  1. This current is chip limited, which is calculated based on RθJC.
  2. This current is calculated on single pulse with 10µs Pulse & Duty Cycle = 1%.
  3. Defined by design, not subject to production test. T_J=25°C, V_DD=400V, V_GS=10V, L=50mH.
  4. Device mounted on FR-4 substrate PC board with 2oz copper in 1inch square cooling area.
  5. Thermal resistance from junction to the exposed pad.
  6. Short duration pulse test used to minimize self-heating effect.
  7. Defined by design; not subject to production.