SMJ60R130BFT product image

Product Detail

SMJ60R130BFT

SineSemi 中晶新源Core Authorized Distributor

HV MOSFETsTO263-3L
Download Datasheet

Specifications

Automotive (Y/N)
N
Package
TO263-3L
Configuration
N
Tj
150 °C
VDS_Max
600 V
ID_Max
23 A
VGS(th)_Typ
4 V
RDS(ON)_Typ @VGS=10V
114 mΩ
RDS(ON)_Max @VGS=10V
137 mΩ
VGS_Max
±30 V
EAS_Max
500 mJ
Ciss_Typ
1250 pF
Coss_Typ
52 pF
Crss_Typ
5.2 pF
Qg_Typ
42 nC

Package & Schematic

SMJ60R130BFT package outline, pin configuration and schematic
Package outline · Pin configuration · Schematic (from SineSemi official datasheet)

Online Datasheet

Compiled from the manufacturer's datasheet; the official document prevails.

SMJ60R130BFT

600V Super Junction N-Channel Power MOSFET

Product Summary
VDS RDS(ON), max ID, max
600 V 137 mΩ @ VGS = 10V 23 A

TO263-3L

Features
  • Low On-Resistance
  • Fast Switching Capability
  • 100% ∆V/DS & UIS & RG Tested
  • RoHS compliant, HALOGEN FREE
Applications
  • LED Lighting
  • Charger and Adapter
  • PC and Telecom Power
Mechanical Data
  • Green Molding Compound
  • Moisture Sensitivity: Level 3 per J-STD-020
  • UL Flammability Classification Rating 94V-0
Ordering Information
Orderable Part Number Package Type Device Marking Form Quantity (pcs)
SMJ60R130BFT TO263-3L 60R130BF 13'' Tape&Reel 1,000
Maximum Ratings (@ TC = 25°C, unless otherwise specified.)
Parameter Symbol Value Unit
Drain - Source Voltage VDS 600 V
Gate - Source Voltage VGS ±30 V
Continuous Drain Current (VGS = 10V) (1) ID TC = 25°C: 23 A
TC = 100°C: 14.5 A
Pulsed Drain Current (2) IDM 92 A
Single Pulse Avalanche Energy (3) EAS 500 mJ
Single Pulse Avalanche Current (L = 10.0mH) IAS 6.5 A
Power Dissipation PD TC = 25°C: 169 W
TC = 100°C: 68 W
MOSFET dv/dt Ruggedness, VDS = 0...400V dv/dt 50 V/ns
Reverse Diodes dv/dt, VDS = 0...400V, ISD ≤ ID dv/dt 50 V/ns
Junction & Storage Temperature Range TJ, TSTG -55 ~ +150 °C
Thermal Characteristics
Parameter Symbol Typ Max Unit
Thermal Resistance, Junction-to-Ambient (4) R_θJA 34 43 °C/W
Thermal Resistance, Junction-to-Case (5) R_θJC 0.57 0.74 °C/W

Electrical Characteristics (@ TJ = 25°C, unless otherwise specified.)

Off Characteristics (6)
Parameter Symbol Test Condition Min Typ Max Unit
Drain-Source Breakdown Voltage V(BR)DSS VGS = 0V, ID = 250mA 600 V
Zero Gate Voltage Drain Current IDSS VDS = 480V, VGS = 0V 1.0 mA
TJ = 125°C 100 mA
Gate-Source Leakage Current IGSS VGS = ±30V, VDS = 0V ±100 nA
On Characteristics (6)
Parameter Symbol Test Condition Min Typ Max Unit
Gate Threshold Voltage VGS(th) VDS = VGS, ID = 250mA 3.0 4.0 5.0 V
Static Drain-Source On-Resistance RDS(on) VGS = 10V, ID = 10A 114 137
Diodes Forward Voltage VSD IS = 10A, VGS = 0V 1.0 1.2 V
Dynamic Characteristics (7)
Parameter Symbol Test Condition Min Typ Max Unit
Input Capacitance Ciss VDS = 100V, VGS = 0V, f = 1MHz 1250 pF
Output Capacitance Coss 52 pF
Reverse Transfer Capacitance Crss 5.2 pF
Effective Output Capacitance, Energy Related (8) Co(er) VGS = 0V, VDS = 0...480V, f = 1MHz 58 pF
Effective Output Capacitance, Time Related (9) Co(tr) 239 pF
Gate Resistance Rg VGS = 0V, VDS = 0V, f = 1MHz 9.7 Ω
Switching Characteristics (7)
Parameter Symbol Test Condition Min Typ Max Unit
Turn-On Delay Time td(on) VGS = 10V, VDS = 400V 50 ns
Rise Time tr ID = 10A, RGEN = 25Ω 51 ns
Turn-Off Delay Time td(off) 156 ns
Fall Time tf 22 ns
Gate Charge Characteristics (7)
Parameter Symbol Test Condition Min Typ Max Unit
Total Gate Charge (VGS = 10V) Qg VDS = 400V, ID = 10A, VGS = 10V 42 nC
Total Gate Charge (VGS = 8.0V) Qg 35 nC
Gate-Source Charge Qgs 9.8 nC
Gate-Drain Charge Qgd 22 nC
Gate Plateau Voltage Vplateau 7.1 V
Drain-Source Diode Characteristics (7)
Parameter Symbol Test Condition Min Typ Max Unit
Body Diode Reverse Recovery Time trr IS = 10A, di/dt = 100A/ms, TJ = 25°C 114 ns
Body Diode Reverse Recovery Charge Qrr 0.50 mC
Body Diode Reverse Recovery Current IRRM 22 A
Diode Forward Current IS TC = 25°C 23 A

Notes:

  1. This current is chip limited, which is calculated based on RθJC.
  2. This current is calculated on single pulse with 10µs Pulse & Duty Cycle = 1%.
  3. Defined by design, not subject to production test. TJ=25°C, VDD=400V, VGS=10V, L=50mH.
  4. Device mounted on FR-4 substrate PC board with 2oz copper in 1inch square cooling area.
  5. Thermal resistance from junction to the exposed pad.
  6. Short duration pulse test used to minimize self-heating effect.
  7. Defined by design; not subject to production.
  8. Co(er) is a fixed capacitance that gives the same stored energy as Coss while VDS is rising from 0 to 480V.
  9. Co(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 480V.