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SMT10T04AHTL

中晶新源 SineSemi核心代理商

中低压 MOSFETTOLL
规格书下载

参数规格

封装
TOLL
结构
N
漏源电压 VDS
100 V
漏极电流 ID
177 A
导通电阻 RDS(ON)@10V 最大
4.4 mΩ
车规 (Y/N)
N
阈值电压 VGS(th) 典型
3 V
导通电阻 RDS(ON)@10V 典型
3.7 mΩ
栅源电压 VGS 最大
±20 V
结温 Tj
175 °C
雪崩能量 EAS 最大
410 mJ
输入电容 Ciss 典型
2784 pF
输出电容 Coss 典型
961 pF
反向传输电容 Crss 典型
31 pF
总栅极电荷 Qg 典型
47 nC
ESD
No
最小包装量
2000 pcs
最小订购量
20000 pcs
应用推荐-马达驱动
Y
应用推荐-高频电源
Y
应用推荐-锂电池保护
Y
应用推荐-通用开关
Y

不确定怎么选？阅读《中低压 MOSFET 选型指南》 →

封装与电路符号

SMT10T04AHTL 封装外形、引脚配置与电路符号图
封装外形 · 引脚配置 · 电路符号（源自中晶新源官方 datasheet）

在线规格书

以下内容整理自原厂规格书，实际参数以原厂正式文件为准。

SMT10T04AHTL

100V N-Channel Power MOSFET

Product Summary
VDS RDS(ON)_TYP I_D_MAX
100 V 3.7 mΩ @VGS = 10V 177 A

TOLL

Features
  • Low On-Resistance
  • Excellent FoM (figure of merit)
  • 100% ΔVDS & UIS & Rg Tested
Applications
  • Motor Drives
  • High-Performance Power Supplies
  • Hard Switching and High Speed Circuit
Mechanical Data
  • Green Molding Compound
  • Moisture Sensitivity: Level 1 per J-STD-020
  • UL Flammability Classification Rating 94V-0
Ordering Information
Orderable Part Number Package Type Device Marking Form Quantity (pcs)
SMT10T04AHTL TOLL 10T04AH 13" Tape&Reel 2,000
Maximum Ratings (@ TC = 25°C, unless otherwise specified.)
Parameter Symbol Value Unit
Drain - Source Voltage VDS 100 V
Gate - Source Voltage VGS ±20 V
Continuous Drain Current (VGS = 10V) (1) ID @ TC = 25°C 177 A
ID @ TC = 100°C 125 A
Pulsed Drain Current (2) IDM 710 A
Single Pulse Avalanche Energy (3) EAS 410 mJ
Single Pulse Avalanche Current (L = 0.1mH) IAS 52 A
Power Dissipation PD @ TC = 25°C 288 W
PD @ TC = 100°C 144 W
Junction & Storage Temperature Range TJ, TSTG -55 ~ +175 °C
Thermal Characteristics
Parameter Symbol Typ. Max. Unit
Thermal Resistance, Junction-to-Ambient (4) R_θJA 25 32 °C/W
Thermal Resistance, Junction-to-Case (5) R_θJC 0.52 0.68 °C/W

Electrical Characteristics (@ TJ = 25°C, unless otherwise specified.)

Parameter Symbol Test Condition Min. Typ. Max. Unit
Off Characteristics (6)
Drain-Source Breakdown Voltage V(BR)DSS VGS = 0V, ID = 250µA 100 — — V
Zero Gate Voltage Drain Current IDSS VDS = 100V, VGS = 0V — — 1.0 µA
TJ = 125°C — — 100 µA
Gate-Source Leakage Current IGSS VGS = ±20V, VDS = 0V — — ±100 nA
On Characteristics (6)
Gate Threshold Voltage VGS(th) VGS = VDS, ID = 250µA 2.0 3.0 4.0 V
Static Drain-Source On-Resistance RDS(ON) VGS = 10V, ID = 80A — 3.7 4.4 mΩ
Forward Transconductance gfs VDS = 5.0V, ID = 20A — 36 — S
Diodes Forward Voltage VSD IS = 2.0A, VGS = 0V — 0.7 1.2 V
Dynamic Characteristics (7)
Input Capacitance Ciss — 2784 — pF
Output Capacitance Coss VDS = 50V, VGS = 0V, f = 1MHz — 961 — pF
Reverse Transfer Capacitance Crss — 31 — pF
Gate Resistance Rg VGS = 0V, VDS = 0V, f = 1MHz — 1.0 — Ω
Switching Characteristics (7)
Turn-On Delay Time td(on) — 9.9 — ns
Rise Time tr VGS = 10V, VDS = 50V — 28 — ns
Turn-Off Delay Time td(off) ID = 80A, RGEN = 3.0Ω — 20 — ns
Fall Time tf — 18 — ns
Gate Charge Characteristics (7)
Total Gate Charge (VGS = 10V) Qg — 47 — nC
Total Gate Charge (VGS = 7.0V) Qg VDS = 50V, ID = 80A — 34 — nC
Gate-Source Charge Qgs VGS = 10V — 12.4 — nC
Gate-Drain Charge Qgd — 11.5 — nC
Gate Plateau Voltage Vplateau — 4.6 — V
Drain-Source Diode Characteristics (7)
Body Diode Reverse Recovery Time trr IF = 80A, dI/dt = 100A/µs, — 64 — ns
Body Diode Reverse Recovery Charge Qrr TJ = 25°C — 102 — nC
Diode Forward Current IS TC = 25°C — — 177 A

Notes:

  1. This current is chip limited, which is calculated based on Rthjc.
  2. This current is calculated on single pulse with 10us Single Pulse.
  3. Defined by design, not subject to production test, EAS condition: TJ = 25°C, VDD = 50V, VGS = 10V, L = 1.0mH.
  4. Device mounted on FR-4 substrate PC board with 2oz copper in 1inch square cooling area.
  5. Thermal resistance from junction to the exposed pad.
  6. Short duration pulse test used to minimize self-heating effect.
  7. Defined by design, not subject to production.

Typical Electrical and Thermal Characteristics

（曲线图略）

  • Figure 1: Output Characteristics（ID vs. VDS，VGS = 5.0V / 5.5V / 6.0V / 6.5V / 7.0V / 8.0V / 10V）
  • Figure 2: Transfer Characteristics（ID vs. VGS，VDS = 3.0V，TJ = 25°C / 175°C）
  • Figure 3: On-Resistance vs. Gate-Source Voltage（RDS(on) vs. VGS，ID = 80A，TJ = 25°C / 175°C）
  • Figure 4: On-Resistance vs. Drain Current and Gate Voltage（RDS(on) vs. ID，VGS = 10V，TJ = 25°C）
  • Figure 5: On-Resistance vs. Junction Temperature（Normalized RDS(on) vs. TJ，VGS = 10V，ID = 80A）
  • Figure 6: Source-Drain Diode Forward Voltage（IS vs. VSD，VGS = 10V，TJ = 25°C / 175°C）
  • Figure 7: Gate Threshold Variation vs. Junction Temperature（VGS(th) vs. TJ，ID = 250µA / 1.0mA）
  • Figure 8: Gate Charge Characteristics（VGS vs. Qg，ID = 80A）
  • Figure 9: Capacitance Characteristics（CT vs. VDS，Ciss / Coss / Crss）
  • Figure 10: Power Derating（PD vs. TC）
  • Figure 11: Current Derating（ID vs. TC）
  • Figure 12: Safe Operating Area（ID vs. VDS，pulse widths 1.0µs / 10µs / 100µs / 1.0ms / 10ms / 100ms / DC，TJ(Max) = 175°C，TC = 25°C）
  • Figure 13: Normalized Maximum Transient Thermal Impedance（r(t) vs. Pulse Width，δ = 0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse）
      1. Duty cycle δ = t1 / t2
      1. R_θJC(t) = r(t) × R_θJC

TOLL Package Outline

Package Dimensions (MILLIMETERS)
DIM. MIN. NOM. MAX.
A 2.200 2.300 2.400
b 0.650 0.800 0.900
b1 9.650 9.800 9.950
b2 0.400 REF
c 0.400 0.500 0.600
D 11.480 11.680 11.950
D1 10.250 — 10.700
D2 2.850 — 3.400
E 9.700 9.900 10.100
E1 8.000 — 9.250
e 1.200 BSC
H1 6.700 7.000 7.300
k 3.000 REF
k1 4.550 REF
L 1.350 — 2.100
L1 0.700 REF
L2 0.600 REF
L3 0.950 1.200 1.350

Package Notes:

  1. DIMENSION AND TOLERANCE PER ASME Y14.5M, 1994.
  2. ALL DIMENSIONS IN MILLIMETER.
  3. DIMENSIONS "E" AND "D1" DO NOT INCLUDE BURRS OR MOLD FLASH. PROTRUSIONS OR GATE BURRS.
Recommended Soldering Footprint (DIMENSIONS: MILLIMETERS)

10.100 × 13.300（overall pad area）；drain pad 8.000 wide × 2.500 tall；source leads 2.800 tall，pitch 1.200，lead width 0.800，spacing 0.400。

（焊盘图略）

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