SMT10T07ALP 产品图

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SMT10T07ALP

中晶新源 SineSemi核心代理商

中低压 MOSFETPDFN5060-8L
规格书下载

参数规格

封装
PDFN5060-8L
结构
N
漏源电压 VDS
100 V
漏极电流 ID
82 A
导通电阻 RDS(ON)@10V 最大
7.1 mΩ
车规 (Y/N)
N
阈值电压 VGS(th) 典型
1.7 V
导通电阻 RDS(ON)@10V 典型
5.9 mΩ
导通电阻 RDS(ON)@4.5V 典型
7.6 mΩ
导通电阻 RDS(ON)@4.5V 最大
9.5 mΩ
栅源电压 VGS 最大
±20 V
结温 Tj
150 °C
雪崩能量 EAS 最大
250 mJ
输入电容 Ciss 典型
1585 pF
输出电容 Coss 典型
693 pF
反向传输电容 Crss 典型
13 pF
总栅极电荷 Qg 典型
27 nC
ESD
No
最小包装量
5000 pcs
最小订购量
50000 pcs
应用推荐-高频电源
Y
应用推荐-锂电池保护
Y
应用推荐-通用开关
Y

不确定怎么选？阅读《中低压 MOSFET 选型指南》 →

封装与电路符号

SMT10T07ALP 封装外形、引脚配置与电路符号图
封装外形 · 引脚配置 · 电路符号（源自中晶新源官方 datasheet）

在线规格书

以下内容整理自原厂规格书，实际参数以原厂正式文件为准。

SMT10T07ALP

100V N-Channel Power MOSFET

Product Summary
VDS RDS(ON), max ID, max
100 V 7.1 mΩ @ VGS = 10V 82 A
9.5 mΩ @ VGS = 4.5V

PDFN5060-8L

Features
  • Low On-Resistance
  • Excellent FoM (figure of merit)
  • 100% ΔVDS & UIS & Rg Tested
Applications
  • Motor controls
  • DC/DC in Telecoms and Inductrial
  • High frequency switching, synchronous rectification
Mechanical Data
  • Green Molding Compound
  • Moisture Sensitivity: Level 3 per J-STD-020
  • UL Flammability Classification Rating 94V-0
Ordering Information
Orderable Part Number Package Type Device Marking Form Quantity (pcs)
SMT10T07ALP PDFN5060-8L 10T07AL 13'' Tape&Reel 5,000
Maximum Ratings (@ TC = 25°C, unless otherwise specified.)
Parameter Symbol Value Unit
Drain - Source Voltage VDS 100 V
Gate - Source Voltage VGS ±20 V
Continuous Drain Current (VGS = 10V) (1) ID TC = 25°C: 82 A
TC = 100°C: 52 A
Pulsed Drain Current (2) IDM 328 A
Single Pulse Avalanche Energy (3) EAS 250 mJ
Single Pulse Avalanche Current (L = 0.1mH) IAS 31 A
Power Dissipation (4) PD TC = 25°C: 89 W
TC = 100°C: 36 W
Junction & Storage Temperature Range TJ, TSTG -55~+150 °C
Thermal Characteristics
Parameter Symbol Typ Max Unit
Thermal Resistance, Junction-to-Ambient (4) R_θJA 36 45 °C/W
Thermal Resistance, Junction-to-Case (5) R_θJC 1.1 1.4 °C/W

Electrical Characteristics (@ TJ = 25°C, unless otherwise specified.)

Off Characteristics
Parameter Symbol Test Condition Min Typ Max Unit
Drain-Source Breakdown Voltage V(BR)DSS VGS = 0V, ID = 250µA 100 — — V
Zero Gate Voltage Drain Current IDSS VDS = 100V, VGS = 0V — — 1.0 µA
Gate-Source Leakage Current IGSS VGS = ±20V, VDS = 0V — — ±100 nA
On Characteristics
Parameter Symbol Test Condition Min Typ Max Unit
Gate Threshold Voltage VGS(th) VDS = VGS, ID = 250µA 1.2 1.7 2.5 V
Static Drain-Source On-Resistance RDS(on) VGS = 10V, ID = 20A — 5.9 7.1 mΩ
Static Drain-Source On-Resistance RDS(on) VGS = 4.5V, ID = 15A — 7.6 9.5 mΩ
Forward Transconductance gfs VDS = 5.0V, ID = 20A — 44 — S
Diode Forward Voltage VSD IS = 2.0A, VGS = 0V — 0.7 1.2 V
Dynamic Characteristics
Parameter Symbol Test Condition Min Typ Max Unit
Input Capacitance Ciss VDS = 50V, VGS = 0V, f = 1MHz — 1585 — pF
Output Capacitance Coss — 693 — pF
Reverse Transfer Capacitance Crss — 13 — pF
Gate Resistance Rg VGS = 0V, VDS = 0V, f = 1MHz — 1.3 — Ω
Switching Characteristics
Parameter Symbol Test Condition Min Typ Max Unit
Turn-On Delay Time td(on) VGS = 10V, VDS = 50V — 4.6 — ns
Rise Time tr ID = 20A, RGEN = 3.0Ω — 10 — ns
Turn-Off Delay Time td(off) — 23 — ns
Fall Time tf — 21 — ns
Gate Charge Characteristics
Parameter Symbol Test Condition Min Typ Max Unit
Total Gate Charge (VGS = 10V) Qg VDS = 50V, ID = 20A — 27 — nC
Total Gate Charge (VGS = 4.5V) Qg VDS = 50V, ID = 20A — 13.2 — nC
Gate-Source Charge Qgs — 4.9 — nC
Gate-Drain Charge Qgd — 5.3 — nC
Gate Plateau Voltage Vplateau — 3.3 — V
Drain-Source Diode Characteristics
Parameter Symbol Test Condition Min Typ Max Unit
Body Diode Reverse Recovery Time trr IS = 20A, di/dt = 100A/µs — 49 — ns
Body Diode Reverse Recovery Charge Qrr TJ = 25°C — 82 — nC
Diode Forward Current IS TC = 25°C — — 82 A

Notes:

  1. This current is chip limited, which is calculated based on Rthjc.
  2. This current is calculated on single pulse with 10us Single Pulse.
  3. Defined by design, not subject to production test, EAS condition: TJ=25°C, VDD=50V, VGS=10V, L=1.0mH.
  4. Device mounted on FR-4 substrate PC board with 2oz copper in 1inch square cooling area.
  5. Thermal resistance from junction to the exposed pad.
  6. Short duration pulse test used to minimize self-heating effect.
  7. Defined by design, not subject to production.
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