
产品详情
SMT6002AHFP5
中晶新源 SineSemi核心代理商
中低压 MOSFETLFPAK5060
参数规格
- 封装
- LFPAK5060
- 结构
- N
- 漏源电压 VDS
- 60 V
- 漏极电流 ID
- 162 A
- 导通电阻 RDS(ON)@10V 最大
- 2.2 mΩ
- 车规 (Y/N)
- N
- 阈值电压 VGS(th) 典型
- 3 V
- 导通电阻 RDS(ON)@10V 典型
- 1.8 mΩ
- 栅源电压 VGS 最大
- ±20 V
- 结温 Tj
- 150 °C
- 雪崩能量 EAS 最大
- 462 mJ
- 输入电容 Ciss 典型
- 3355 pF
- 输出电容 Coss 典型
- 1469 pF
- 反向传输电容 Crss 典型
- 66 pF
- 总栅极电荷 Qg 典型
- 59 nC
- ESD
- No
- 最小包装量
- 5000 pcs
- 最小订购量
- 50000 pcs
- 应用推荐-马达驱动
- Y
- 应用推荐-高频电源
- Y
- 应用推荐-通用开关
- Y
封装与电路符号
封装外形 · 引脚配置 · 电路符号(源自中晶新源官方 datasheet)在线规格书
以下内容整理自原厂规格书,实际参数以原厂正式文件为准。
SMT6002AHFP5
60V N-Channel Power MOSFET
Product Summary
| V_DS |
R_DS(ON), max |
I_D, max |
| 60 V |
2.2 mΩ @ V_GS = 10V |
162 A |
LFPAK5060
Maximum Ratings (@ T_A = 25°C, unless otherwise specified.)
| Parameter |
Symbol |
Value |
Units |
| Drain - Source Voltage |
V_DS |
60 |
V |
| Gate - Source Voltage |
V_GS |
±20 |
V |
| Continuous Drain Current (V_GS = 10V) ^(1) |
I_D @ T_C = 25°C |
162 |
A |
|
I_D @ T_C = 100°C |
102 |
A |
| Pulsed Drain Current ^(2) |
I_DM |
609 |
A |
| Single Pulse Avalanche Energy ^(3) |
E_AS |
462 |
mJ |
| Single Pulse Avalanche Current (L = 0.1mH) |
I_AS |
54 |
A |
| Power Dissipation |
P_D @ T_C = 25°C |
104 |
W |
|
P_D @ T_C = 100°C |
42 |
W |
| Junction & Storage Temperature Range |
T_J, T_STG |
-55~+150 |
°C |
Thermal Characteristics
| Parameter |
Symbol |
Typ |
Max |
Unit |
| Thermal Resistance, Junction-to-Ambient ^(4) |
R_θJA |
35 |
44 |
°C/W |
| Thermal Resistance, Junction-to-Case ^(5) |
R_θJC |
0.90 |
1.2 |
°C/W |
Electrical Characteristics (@ T_J = 25°C, unless otherwise specified.)
Off Characteristics
| Parameter |
Symbol |
Test Condition |
Min |
Typ |
Max |
Units |
| Drain-Source Breakdown Voltage |
V_(BR)DSS |
V_GS = 0V, I_D = 250µA |
60 |
— |
— |
V |
|
|
V_DS = 60V, V_GS = 0V |
— |
— |
1.0 |
µA |
| Zero Gate Voltage Drain Current |
I_DSS |
T_J = 125°C |
— |
— |
100 |
µA |
| Gate-Source Leakage Current |
I_GSS |
V_GS = ±20V, V_DS = 0V |
— |
— |
±100 |
nA |
On Characteristics
| Parameter |
Symbol |
Test Condition |
Min |
Typ |
Max |
Units |
| Gate Threshold Voltage |
V_GS(th) |
V_GS = V_DS, I_D = 250µA |
2.0 |
3.0 |
4.0 |
V |
| Static Drain-Source On-Resistance |
R_DS(on) |
V_GS = 10V, I_D = 20A |
— |
1.8 |
2.2 |
mΩ |
| Forward Transconductance |
g_fs |
V_DS = 5.0V, I_D = 20A |
— |
50 |
— |
S |
| Diodes Forward Voltage |
V_SD |
I_S = 2.0A, V_GS = 0V |
— |
0.7 |
1.2 |
V |
Dynamic Characteristics
| Parameter |
Symbol |
Test Condition |
Min |
Typ |
Max |
Units |
| Input Capacitance |
C_iss |
|
— |
3355 |
— |
pF |
| Output Capacitance |
C_oss |
V_DS = 30V, V_GS = 0V, f = 1MHz |
— |
1469 |
— |
pF |
| Reverse Transfer Capacitance |
C_rss |
|
— |
66 |
— |
pF |
| Gate Resistance |
R_g |
V_GS = 0V, V_DS = 0V, f = 1MHz |
— |
1.4 |
— |
Ω |
Switching Characteristics
| Parameter |
Symbol |
Test Condition |
Min |
Typ |
Max |
Units |
| Turn-On Delay Time |
t_d(on) |
|
— |
16 |
— |
ns |
| Rise Time |
t_r |
V_DS = 30V, V_GS = 10V |
— |
39 |
— |
ns |
| Turn-Off Delay Time |
t_d(off) |
I_D = 20A, R_GEN = 3.0Ω |
— |
52 |
— |
ns |
| Fall Time |
t_f |
|
— |
20 |
— |
ns |
Gate Charge Characteristics
| Parameter |
Symbol |
Test Condition |
Min |
Typ |
Max |
Units |
| Total Gate Charge (V_GS = 10V) |
Q_g |
|
— |
59 |
— |
nC |
| Gate-Source Charge |
Q_gs |
V_DS = 30V, I_D = 20A |
— |
16.2 |
— |
nC |
| Gate-Drain Charge |
Q_gd |
|
— |
14.0 |
— |
nC |
| Gate Plateau Voltage |
V_plateau |
|
— |
4.7 |
— |
V |
Drain-Source Diode Characteristics
| Parameter |
Symbol |
Test Condition |
Min |
Typ |
Max |
Units |
| Body Diode Reverse Recovery Time |
t_rr |
I_S = 20A, di/dt = 100A/µs |
— |
119 |
— |
ns |
| Body Diode Reverse Recovery Charge |
Q_rr |
T_J = 25°C |
— |
76 |
— |
nC |
| Diode Forward Current |
I_S |
T_J = 25°C |
— |
— |
168 |
A |
Notes:
- This current is chip limited, which is calculated based on Rthjc.
- This current is calculated on single pulse with 10μs Single Pulse.
- Defined by design, not subject to production test, EAS condition: TJ=25°C, VDD=30V, VGS=10V, L=1.0mH.
- Device mounted on FR-4 substrate PC board with 2oz copper in 1inch square cooling area.
- Thermal resistance from junction to the exposed pad.
- Short duration pulse test used to minimize self-heating effect.
- Defined by design, not subject to production.