SMT4002ALR 产品图

产品详情

SMT4002ALR

中晶新源 SineSemi核心代理商

中低压 MOSFETPDFN3333-8L

参数规格

封装
PDFN3333-8L
结构
N
漏源电压 VDS
40 V
漏极电流 ID
128 A
导通电阻 RDS(ON)@10V 最大
2 mΩ
车规 (Y/N)
N
阈值电压 VGS(th) 典型
1.7 V
导通电阻 RDS(ON)@10V 典型
1.6 mΩ
导通电阻 RDS(ON)@4.5V 典型
2.4 mΩ
导通电阻 RDS(ON)@4.5V 最大
3 mΩ
栅源电压 VGS 最大
±20 V
结温 Tj
150 °C
雪崩能量 EAS 最大
292 mJ
输入电容 Ciss 典型
2091 pF
输出电容 Coss 典型
1260 pF
反向传输电容 Crss 典型
45 pF
总栅极电荷 Qg 典型
30 nC
ESD
No
最小包装量
5000 pcs
最小订购量
50000 pcs
应用推荐-马达驱动
Y
应用推荐-通用开关
Y

在线规格书

以下内容整理自原厂规格书,实际参数以原厂正式文件为准。

SMT4002ALR

40V N-Channel Power MOSFET

Product Summary
V_DS R_DS(ON)_TYP I_D_MAX
40 V 1.6 mΩ @ V_GS = 10V 128 A
2.4 mΩ @ V_GS = 4.5V

PDFN3333-8L

Features
  • Low On-Resistance
  • Excellent FoM (figure of merit)
  • 100% ΔVDS & UIS & Rg Tested
Applications
  • Motor drives
  • Load switching
  • High frequency switching, synchronous rectification
Mechanical Data
  • Green Molding Compound
  • Moisture Sensitivity: Level 1 per J-STD-020
  • UL Flammability Classification Rating 94V-0
Ordering Information
Orderable Part Number Package Type Device Marking Form Quantity (pcs)
SMT4002ALR PDFN3333-8L 4002AL 13" Tape&Reel 5,000
Maximum Ratings (@ T_C = 25°C, unless otherwise specified.)
Parameter Symbol Value Units
Drain - Source Voltage V_DS 40 V
Gate - Source Voltage V_GS ±20 V
Continuous Drain Current (V_GS = 10V) ^(1) I_D @ T_C = 25°C 128 A
I_D @ T_C = 100°C 81 A
Pulsed Drain Current ^(2) I_DM 513 A
Single Pulse Avalanche Energy ^(3) E_AS 292 mJ
Single Pulse Avalanche Current (L = 0.1mH) I_AS 42 A
Power Dissipation P_D @ T_C = 25°C 52 W
P_D @ T_C = 100°C 21 W
Junction & Storage Temperature Range T_J, T_STG -55 ~ +150 °C
Thermal Characteristics
Parameter Symbol Typ. Max. Unit
Thermal Resistance, Junction-to-Ambient ^(4) R_θJA 40 50 °C/W
Thermal Resistance, Junction-to-Case ^(5) R_θJC 1.8 2.4 °C/W

Electrical Characteristics (@ T_J = 25°C, unless otherwise specified.)

Off Characteristics ^(6)
Parameter Symbol Test Condition Min. Typ. Max. Unit
Drain-Source Breakdown Voltage V_(BR)DSS V_GS = 0V, I_D = 250µA 40 V
Zero Gate Voltage Drain Current I_DSS V_DS = 40V, V_GS = 0V 1.0 µA
T_J = 125°C 100 µA
Gate-Source Leakage Current I_GSS V_GS = ±20V, V_DS = 0V ±100 nA
On Characteristics ^(6)
Parameter Symbol Test Condition Min. Typ. Max. Unit
Gate Threshold Voltage V_GS(th) V_GS = V_DS, I_D = 250µA 1.2 1.7 2.5 V
Static Drain-Source On-Resistance R_DS(ON) V_GS = 10V, I_D = 20A 1.6 2.0
V_GS = 4.5V, I_D = 15A 2.4 3.0
Forward Transconductance g_fs V_DS = 5.0V, I_D = 20A 47 S
Diodes Forward Voltage V_SD I_S = 2.0A, V_GS = 0V 0.7 1.2 V
Dynamic Characteristics ^(7)
Parameter Symbol Test Condition Min. Typ. Max. Unit
Input Capacitance C_iss 2091 pF
Output Capacitance C_oss V_DS = 20V, V_GS = 0V, f = 1MHz 1260 pF
Reverse Transfer Capacitance C_rss 45 pF
Gate Resistance R_g V_GS = 0V, V_DS = 0V, f = 1MHz 1.7 Ω
Switching Characteristics ^(7)
Parameter Symbol Test Condition Min. Typ. Max. Unit
Turn-On Delay Time t_d(on) 3.6 ns
Rise Time t_r V_GS = 10V, V_DS = 20V 6.6 ns
Turn-Off Delay Time t_d(off) I_D = 20A, R_GEN = 3.0Ω 24 ns
Fall Time t_f 10 ns
Gate Charge Characteristics ^(7)
Parameter Symbol Test Condition Min. Typ. Max. Unit
Total Gate Charge (V_GS = 10V) Q_g 30 nC
Total Gate Charge (V_GS = 4.5V) Q_g V_DS = 20V, I_D = 20A 14.6 nC
Gate-Source Charge Q_gs V_GS = 10V 6.3 nC
Gate-Drain Charge Q_gd 4.1 nC
Gate Plateau Voltage V_plateau 3.0 V
Drain-Source Diode Characteristics ^(7)
Parameter Symbol Test Condition Min. Typ. Max. Unit
Body Diode Reverse Recovery Time t_rr I_F = 20A, dI/dt = 100A/µs, 39 ns
Body Diode Reverse Recovery Charge Q_rr T_J = 25°C 43 nC
Diode Forward Current I_S T_C = 25°C 124 A

Notes:

  1. This current is chip limited, which is calculated based on Rthjc.
  2. This current is calculated on single pulse with 10µs Single Pulse.
  3. Defined by design, not subject to production test, E_AS condition: T_J=25°C, V_DD=20V, V_GS=10V, L=1.0mH.
  4. Device mounted on FR-4 substrate PC board with 2oz copper in 1inch square cooling area.
  5. Thermal resistance from junction to the exposed pad.
  6. Short duration pulse test used to minimize self-heating effect.
  7. Defined by design, not subject to production.

Typical Electrical and Thermal Characteristics

  • Figure 1: Output Characteristics(曲线图略)
  • Figure 2: Transfer Characteristics(曲线图略)
  • Figure 3: On-Resistance vs. Gate-Source Voltage(曲线图略)
  • Figure 4: On-Resistance vs. Drain Current and Gate Voltage(曲线图略)
  • Figure 5: On-Resistance vs. Junction Temperature(曲线图略)
  • Figure 6: Source-Drain Diode Forward Voltage(曲线图略)
  • Figure 7: Gate Threshold Variation vs. Junction Temperature(曲线图略)
  • Figure 8: Gate Charge Characteristics(曲线图略)
  • Figure 9: Capacitance Characteristics(曲线图略)
  • Figure 10: Power Derating(曲线图略)
  • Figure 11: Current Derating(曲线图略)
  • Figure 12: Safe Operating Area(曲线图略)
  • Figure 13: Normalized Maximum Transient Thermal Impedance(曲线图略)

Figure 13 notes:

  1. Duty cycle δ = t_1 / t_2
  2. R_JC(t) = r(t) * R_JC

δ = 0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse


PDFN3333-8L Package Outline

Package Dimensions
DIM. MIN. NOM. MAX.
A 0.70 0.80 0.90
b 0.20 0.30 0.40
c 0.10 0.15 0.25
D 3.20 3.30 3.40
D1 3.00 3.15 3.25
D2 2.35 2.69
E 3.20 3.35 3.45
E1 2.85 3.10 3.20
E2 1.48 1.98
e 0.65 BSC
H 0.25 0.60
L 0.25 0.40 0.50
a 15°

DIMENSIONS: MILLIMETERS

Notes:

  1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
  2. ALL DIMENSIONS IN MILLIMETER (ANGLE IN DEGREE).
  3. DIMENSIONS D1 AND E1 DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS.
Recommended Soldering Footprint (DIMENSIONS: MILLIMETERS)
Dimension Value
Overall height 3.700
Overall width 2.550
Pad pitch (e) 0.650
Pad length 0.400
Pad width 0.515
Pad-to-pad gap (top) 0.675
Center pad width 1.930
Center pad length (outer) 0.400
PIN Configuration (Top View)
D  D  D  D
S  S  S  G

Schematic Diagram: G — gate, D — drain, S — source (standard N-Channel MOSFET symbol)