SMT6002ALP product image

Product Detail

SMT6002ALP

SineSemi 中晶新源Core Authorized Distributor

LV & MV MOSFETsPDFN5060-8L
Download Datasheet

Specifications

Package
PDFN5060-8L
Configuration
N
VDS_Max
60 V
ID
165 A
RDS(ON)_Max @VGS=10V
2.1 mΩ
Automotive (Y/N)
N
VGS(th)_Typ
1.7 V
RDS(ON)_Typ @VGS=10V
1.7 mΩ
RDS(ON)_Typ @VGS=4.5V
2.3 mΩ
RDS(ON)_Max @VGS=4.5V
2.9 mΩ
VGS_Max
±20 V
Tj
150 °C
EAS_Max
462 mJ
Ciss_Typ
2908 pF
Coss_Typ
1183 pF
Crss_Typ
38 pF
Qg_Typ
61 nC
ESD
No
MPQ
5000 pcs
MOQ
50000 pcs
App: HF Power
Y
App: Battery Protection
Y
App: General Switch
Y

Package & Schematic

SMT6002ALP package outline, pin configuration and schematic
Package outline · Pin configuration · Schematic (from SineSemi official datasheet)

Online Datasheet

Compiled from the manufacturer's datasheet; the official document prevails.

SMT6002ALP

60V N-Channel Power MOSFET

Product Summary
V_DS R_DS(ON), max I_D, max
— V 2.1 mΩ @ V_GS = 10V 165 A

PDFN5060-8L

Maximum Ratings (@ T_A = 25°C, unless otherwise specified.)
Parameter Symbol Value Units
Drain - Source Voltage V_DS 60 V
Gate - Source Voltage V_GS ±20 V
Continuous Drain Current (V_GS = 10V) ^(1) I_D @ T_C = 25°C 165 A
I_D @ T_C = 100°C 104 A
Pulsed Drain Current ^(2) I_DM 659 A
Single Pulse Avalanche Energy ^(3) E_AS 462 mJ
Single Pulse Avalanche Current (L = 0.1mH) I_AS 54 A
Power Dissipation P_D @ T_C = 25°C 104 W
P_D @ T_C = 100°C 42 W
Junction & Storage Temperature Range T_J, T_STG -55~+150 °C
Thermal Characteristics
Parameter Symbol Typ Max Unit
Thermal Resistance, Junction-to-Ambient ^(4) R_θJA 35 44 °C/W
Thermal Resistance, Junction-to-Case ^(5) R_θJC 0.9 1.2 °C/W

Electrical Characteristics (@ T_J = 25°C, unless otherwise specified.)

Off Characteristics
Parameter Symbol Test Condition Min Typ Max Units
Drain-Source Breakdown Voltage V_(BR)DSS V_GS = 0V, I_D = 250µA 60 V
V_DS = 60V, V_GS = 0V 1.0 µA
Zero Gate Voltage Drain Current I_DSS T_J = 125°C 100 µA
Gate-Source Leakage Current I_GSS V_GS = ±20V, V_DS = 0V ±100 nA
On Characteristics
Parameter Symbol Test Condition Min Typ Max Units
Gate Threshold Voltage V_GS(th) V_GS = V_DS, I_D = 250µA 1.2 1.7 2.5 V
Static Drain-Source On-Resistance R_DS(on) V_GS = 4.5V, I_D = 15A 2.3 2.9
Static Drain-Source On-Resistance R_DS(on) V_GS = 10V, I_D = 20A 1.7 2.1
Forward Transconductance g_fs V_DS = 5.0V, I_D = 20A 58 S
Diodes Forward Voltage V_SD I_S = 2.0A, V_GS = 0V 0.7 1.2 V
Dynamic Characteristics
Parameter Symbol Test Condition Min Typ Max Units
Input Capacitance C_iss 2908 pF
Output Capacitance C_oss V_DS = 30V, V_GS = 0V, f = 1MHz 1183 pF
Reverse Transfer Capacitance C_rss 38 pF
Gate Resistance R_g V_GS = 0V, V_DS = 0V, f = 1MHz 1.4 Ω
Switching Characteristics
Parameter Symbol Test Condition Min Typ Max Units
Turn-On Delay Time t_d(on) 4.1 ns
Rise Time t_r V_DS = 30V, V_GS = 10V 13 ns
Turn-Off Delay Time t_d(off) I_D = 20A, R_GEN = 3.0Ω 50 ns
Fall Time t_f 23 ns
Gate Charge Characteristics
Parameter Symbol Test Condition Min Typ Max Units
Total Gate Charge (V_GS = 10V) Q_g 61 nC
Total Gate Charge (V_GS = 4.5V) Q_g 32 nC
Gate-Source Charge Q_gs V_DS = 30V, I_D = 20A 8.6 nC
Gate-Drain Charge Q_gd 15 nC
Gate Plateau Voltage V_plateau 2.9 V
Drain-Source Diode Characteristics
Parameter Symbol Test Condition Min Typ Max Units
Body Diode Reverse Recovery Time t_rr I_S = 20A, di/dt = 100A/µs 53 ns
Body Diode Reverse Recovery Charge Q_rr T_J = 25°C 61 nC
Diode Forward Current I_S T_J = 25°C 165 A

Notes:

  1. This current is chip limited, which is calculated based on Rthjc.
  2. This current is calculated on single pulse with 10μs Single Pulse.
  3. Defined by design, not subject to production test, EAS condition: TJ=25°C, VDD=30V, VGS=10V, L=1.0mH.
  4. Device mounted on FR-4 substrate PC board with 2oz copper in 1inch square cooling area.
  5. Thermal resistance from junction to the exposed pad.
  6. Short duration pulse test used to minimize self-heating effect.
  7. Defined by design, not subject to production.