SMT4007ALP product image

Product Detail

SMT4007ALP

SineSemi 中晶新源Core Authorized Distributor

LV & MV MOSFETsPDFN5060-8L
Download Datasheet

Specifications

Package
PDFN5060-8L
Configuration
N
VDS_Max
40 V
ID
59 A
RDS(ON)_Max @VGS=10V
6.8 mΩ
Automotive (Y/N)
N
VGS(th)_Typ
1.7 V
RDS(ON)_Typ @VGS=10V
5.7 mΩ
RDS(ON)_Typ @VGS=4.5V
7.9 mΩ
RDS(ON)_Max @VGS=4.5V
9.9 mΩ
VGS_Max
±20 V
Tj
150 °C
EAS_Max
53 mJ
Ciss_Typ
570 pF
Coss_Typ
359 pF
Crss_Typ
20 pF
Qg_Typ
9 nC
ESD
No
MPQ
5000 pcs
MOQ
50000 pcs
App: HF Power
Y
App: Battery Protection
Y
App: General Switch
Y

Package & Schematic

SMT4007ALP package outline, pin configuration and schematic
Package outline · Pin configuration · Schematic (from SineSemi official datasheet)

Online Datasheet

Compiled from the manufacturer's datasheet; the official document prevails.

SMT4007ALP

40V N-Channel Power MOSFET

Product Summary
V_DS R_DS(ON), max I_D, max
40 V 5.8 mΩ @ V_GS = 10V 59 A
9.9 mΩ @ V_GS = 4.5V

PDFN5060-8L

Maximum Ratings (@ T_A = 25°C, unless otherwise specified.)
Parameter Symbol Value Units
Drain - Source Voltage V_DS 40 V
Gate - Source Voltage V_GS ±20 V
Continuous Drain Current (V_GS = 10V) ^(1) I_D @ T_A = 25°C 59 A
I_D @ T_C = 100°C 37 A
Pulsed Drain Current ^(2) I_DM 232 A
Single Pulse Avalanche Energy ^(3) E_AS 53 mJ
Single Pulse Avalanche Current (L = 0.1mH) I_AS 19 A
Power Dissipation P_D @ T_A = 25°C 39 W
P_D @ T_C = 100°C 16 W
Junction & Storage Temperature Range T_J, T_STG -55~+150 °C
Thermal Characteristics
Parameter Symbol Typ Max Unit
Thermal Resistance, Junction-to-Ambient ^(4) R_θJA 48 60 °C/W
Thermal Resistance, Junction-to-Case ^(5) R_θJC 2.4 3.2 °C/W

Electrical Characteristics (@ T_J = 25°C, unless otherwise specified.)

Off Characteristics
Parameter Symbol Test Condition Min Typ Max Units
Drain-Source Breakdown Voltage V_(BR)DSS V_GS = 0V, I_D = 250µA 40 — — V
V_DS = 40V, V_GS = 0V — — 1.0 µA
Zero Gate Voltage Drain Current I_DSS T_J = 125°C — — 100 µA
Gate-Source Leakage Current I_GSS V_GS = ±20V, V_DS = 0V — — ±100 nA
On Characteristics
Parameter Symbol Test Condition Min Typ Max Units
Gate Threshold Voltage V_GS(th) V_GS = V_DS, I_D = 250µA 1.2 — 2.5 V
Static Drain-Source On-Resistance R_DS(on) V_GS = 10V — 5.7 6.8 mΩ
V_GS = 4.5V — 7.9 9.9 mΩ
Forward Transconductance g_fs V_DS = 5.0V, I_D = 20A — 17 — S
Diodes Forward Voltage V_SD I_S = 2.0A, V_GS = 0V — 0.7 1.2 V
Dynamic Characteristics
Parameter Symbol Test Condition Min Typ Max Units
Input Capacitance C_iss — 570 — pF
Output Capacitance C_oss V_DS = 20V, V_GS = 0V, f = 1MHz — 359 — pF
Reverse Transfer Capacitance C_rss — 20 — pF
Gate Resistance R_g V_GS = 0V, V_DS = 0V, f = 1MHz — 5.5 — Ω
Switching Characteristics
Parameter Symbol Test Condition Min Typ Max Units
Turn-On Delay Time t_d(on) — 2.0 — ns
Rise Time t_r V_DS = 20V, V_GS = 20V — 2.4 — ns
Turn-Off Delay Time t_d(off) I_D = 20A, R_GEN = 3.0Ω — 14 — ns
Fall Time t_f — 7.9 — ns
Gate Charge Characteristics
Parameter Symbol Test Condition Min Typ Max Units
Total Gate Charge (V_GS = 10V) Q_g — 9.0 — nC
Gate-Source Charge Q_gs V_DS = 20V, I_D = 20A — 1.8 — nC
Gate-Drain Charge Q_gd — 0.6 — nC
Gate Plateau Voltage V_plateau — 3.0 — V
Drain-Source Diode Characteristics
Parameter Symbol Test Condition Min Typ Max Units
Body Diode Reverse Recovery Time t_rr I_S = 20A, di/dt = 100A/µs — 27 — ns
Diode Forward Current I_S T_J = 25°C — — 47 A

Notes:

  1. This current is chip limited, which is calculated based on Rθjc.
  2. This current is calculated on single pulse with 10µs Pulse & Duty Cycle = 1%.
  3. Defined by design; not subject to production test.
  4. Device mounted on FR4 substrate PC board with 2oz copper on 1inch square cooling area.
  5. Thermal resistance from junction to the exposed pad.
  6. Short duration pulse test used to minimize self-heating effect.
  7. Defined by design, not subject to production.
OX1S40N04TPackageTO-252ConfigurationNOX1S5N04TPackageSOT-23ConfigurationNOX1S60N04TPackageTO-252ConfigurationNOX1S80N04TPackageTO-252ConfigurationNOXS043N04APackagePDFN5×6-8LConfigurationNSMN4007ALPPackagePDFN5060-8LVDS_Max40 V