SMT4005CHRQ product image

Product Detail

SMT4005CHRQ

SineSemi 中晶新源Core Authorized Distributor

LV & MV MOSFETsAutomotivePDFN3333-8L
Download Datasheet

Specifications

Package
PDFN3333-8L
Configuration
N
VDS_Max
40 V
ID
67 A
RDS(ON)_Max @VGS=10V
4.7 mΩ
Automotive (Y/N)
Y
VGS(th)_Typ
3 V
RDS(ON)_Typ @VGS=10V
3.9 mΩ
VGS_Max
±20 V
Tj
175 °C
EAS_Max
116 mJ
Ciss_Typ
982 pF
Coss_Typ
593 pF
Crss_Typ
25 pF
Qg_Typ
14 nC
ESD
No
MPQ
5000 pcs
MOQ
50000 pcs
App: Motor Drive
Y
App: HF Power
Y
App: General Switch
Y

Package & Schematic

SMT4005CHRQ package outline, pin configuration and schematic
Package outline · Pin configuration · Schematic (from SineSemi official datasheet)

Online Datasheet

Compiled from the manufacturer's datasheet; the official document prevails.

SMT4005CHRQ

40V N-Channel Power MOSFET

Product Summary
V_DS R_DS(ON), max I_D, max
40 V 4.7 mΩ @ V_GS = 10V 67 A

PDFN3333-8L

Ordering Information
Orderable Part Number Package Type Device Marking Form Quantity (pcs)
SMT4005CHRQ PDFN3333-8L 4005CHQ 13'' Tape&Reel 5,000
Maximum Ratings (@ T_C = 25°C, unless otherwise specified.)
Parameter Symbol Value Unit
Drain - Source Voltage V_DS 40 V
Gate - Source Voltage V_GS ±20 V
Continuous Drain Current (V_GS = 10V) ^(1) I_D @ T_C = 25°C 67 A
I_D @ T_C = 100°C 47 A
Pulsed Drain Current ^(2) I_DM 223 A
Single Pulse Avalanche Energy ^(3) E_AS 116 mJ
Single Pulse Avalanche Current (L = 0.1mH) I_AS 28 A
Power Dissipation P_D @ T_C = 25°C 38 W
P_D @ T_C = 100°C 19 W
Junction & Storage Temperature Range T_J, T_STG -55 ~ +175 °C
Thermal Characteristics
Parameter Symbol Typ Max Unit
Thermal Resistance, Junction-to-Ambient ^(4) R_θJA 50 63 °C/W
Thermal Resistance, Junction-to-Case ^(5) R_θJC 3.0 3.9 °C/W

Electrical Characteristics (@ T_J = 25°C, unless otherwise specified.)

Off Characteristics
Parameter Symbol Test Condition Min Typ Max Unit
Drain-Source Breakdown Voltage V_(BR)DSS V_GS = 0V, I_D = 250µA 40 V
Zero Gate Voltage Drain Current I_DSS V_DS = 40V, V_GS = 0V 1.0 µA
T_J = 125°C 100 µA
Gate-Source Leakage Current I_GSS V_GS = ±20V, V_DS = 0V ±100 nA
On Characteristics
Parameter Symbol Test Condition Min Typ Max Unit
Gate Threshold Voltage V_GS(th) V_GS = V_DS, I_D = 250µA 2.0 3.0 4.0 V
Static Drain-Source On-Resistance R_DS(on) V_GS = 10V, I_D = 20A 3.9 4.7
Forward Transconductance g_fs V_DS = 5.0V, I_D = 20A 15 S
Diode Forward Voltage V_SD I_S = 2.0A, V_GS = 0V 0.7 1.2 V
Dynamic Characteristics
Parameter Symbol Test Condition Min Typ Max Unit
Input Capacitance C_iss pF
Output Capacitance C_oss V_DS = —V, V_GS = 0V, f = 1MHz pF
Reverse Transfer Capacitance C_rss pF
Gate Resistance R_g V_GS = 0V, V_DS = 0V, f = 1MHz 4.2 Ω
Switching Characteristics
Parameter Symbol Test Condition Min Typ Max Unit
Turn-On Delay Time t_d(on) 3.7 ns
Rise Time t_r V_GS = 10V, V_DS = 20V 3.4 ns
Turn-Off Delay Time t_d(off) I_D = 20A, R_GEN = 3.0Ω 15 ns
Fall Time t_f 6.8 ns
Gate Charge Characteristics
Parameter Symbol Test Condition Min Typ Max Unit
Gate Plateau Voltage V_plateau 5.2 V
Drain-Source Diode Characteristics
Parameter Symbol Test Condition Min Typ Max Unit
Body Diode Reverse Recovery Time t_rr I_F = 20A, dI/dt = 100A/s 30 ns
Body Diode Reverse Recovery Charge Q_rr T_J = 25°C 13 nC
Diode Forward Current I_S T_C = 25°C 49 A

Notes:

  1. This current is chip limited, which is calculated based on R_θJC.
  2. This current is calculated on single pulse with 10µs Pulse & Duty Cycle = 1%.
  3. Defined by design; not subject to production test.
  4. Device mounted on FR-4 substrate PC board with 2oz copper on 1inch square cooling area.
  5. Thermal resistance from junction to the exposed pad.
  6. Short duration pulse test used to minimize self-heating effect.
  7. Defined by design, not subject to production.