Specifications
- Package
- PDFN5060-8L
- Configuration
- N
- VDS_Max
- 30 V
- ID
- 60 A
- RDS(ON)_Max @VGS=10V
- 5.9 mΩ
- Automotive (Y/N)
- N
- VGS(th)_Typ
- 1.7 V
- RDS(ON)_Typ @VGS=10V
- 5.1 mΩ
- RDS(ON)_Typ @VGS=4.5V
- 7.8 mΩ
- RDS(ON)_Max @VGS=4.5V
- 9.8 mΩ
- VGS_Max
- ±20 V
- Tj
- 150 °C
- EAS_Max
- 48 mJ
- Ciss_Typ
- 564 pF
- Coss_Typ
- 375 pF
- Crss_Typ
- 24 pF
- Qg_Typ
- 8.3 nC
- ESD
- No
- MPQ
- 5000 pcs
- MOQ
- 50000 pcs
- App: Motor Drive
- Y
- App: General Switch
- Y
Not sure how to choose? Read the LV & MV MOSFETs Selection Guide →
Package & Schematic
Package outline · Pin configuration · Schematic (from SineSemi official datasheet)Online Datasheet
Compiled from the manufacturer's datasheet; the official document prevails.
SMT3005ALP
30V N-Channel Power MOSFET
Product Summary
| VDS |
RDS(ON), max |
ID, max |
| 30 V |
5.9 mΩ @ VGS = 10V |
60 A |
|
9.8 mΩ @ VGS = 4.5V |
|
PDFN5060-8L
Maximum Ratings (@ TC = 25°C, unless otherwise specified.)
| Parameter |
Symbol |
Value |
Unit |
| Drain - Source Voltage |
VDS |
30 |
V |
| Gate - Source Voltage |
VGS |
±20 |
V |
| Continuous Drain Current (1) |
ID @ TC = 25°C |
60 |
A |
|
ID @ TC = 100°C |
38 |
A |
| Pulsed Drain Current (2) |
IDM |
197 |
A |
| Single Pulse Avalanche Energy (3) |
EAS |
48 |
mJ |
| Single Pulse Avalanche Current (L = 0.1mH) |
IAS |
17 |
A |
| Power Dissipation |
PD @ TC = 25°C |
33 |
W |
|
PD @ TC = 100°C |
13 |
W |
| Junction & Storage Temperature Range |
TJ, TSTG |
-55~+150 |
°C |
Thermal Characteristics
| Parameter |
Symbol |
Typ |
Max |
Unit |
| Thermal Resistance, Junction-to-Ambient (4) |
R_θJA |
50 |
63 |
°C/W |
| Thermal Resistance, Junction-to-Case (5) |
R_θJC |
2.9 |
3.8 |
°C/W |
Electrical Characteristics (@ TJ = 25°C, unless otherwise specified.)
Off Characteristics
| Parameter |
Symbol |
Test Condition |
Min |
Typ |
Max |
Unit |
| Drain-Source Breakdown Voltage |
V(BR)DSS |
VGS = 0V, ID = 250µA |
30 |
— |
— |
V |
| Zero Gate Voltage Drain Current |
IDSS |
VDS = 30V, VGS = 0V |
— |
— |
1.0 |
µA |
|
|
TJ = 125°C |
— |
— |
100 |
µA |
| Gate-Source Leakage Current |
IGSS |
VGS = ±20V, VDS = 0V |
— |
— |
±100 |
nA |
On Characteristics
| Parameter |
Symbol |
Test Condition |
Min |
Typ |
Max |
Unit |
| Gate Threshold Voltage |
VGS(th) |
VGS = VDS, ID = 250µA |
1.2 |
1.7 |
2.5 |
V |
| Static Drain-Source On-Resistance |
RDS(on) |
VGS = 10V, ID = 20A |
— |
5.1 |
5.9 |
mΩ |
|
|
VGS = 4.5V, ID = 15A |
— |
7.8 |
9.8 |
mΩ |
| Forward Transconductance |
gfs |
VDS = 5.0V, ID = 20A |
— |
9.9 |
— |
S |
| Diodes Forward Voltage |
VSD |
IS = 2.0A, VGS = 0V |
— |
0.7 |
1.2 |
V |
Dynamic Characteristics
| Parameter |
Symbol |
Test Condition |
Min |
Typ |
Max |
Unit |
| Input Capacitance |
Ciss |
VDS = 15V, VGS = 0V, f = 1MHz |
— |
564 |
— |
pF |
| Output Capacitance |
Coss |
|
— |
375 |
— |
pF |
| Reverse Transfer Capacitance |
Crss |
|
— |
24 |
— |
pF |
| Gate Resistance |
Rg |
VGS = 0V, VDS = 0V, f = 1MHz |
— |
4.7 |
— |
Ω |
Switching Characteristics
| Parameter |
Symbol |
Test Condition |
Min |
Typ |
Max |
Unit |
| Turn-On Delay Time |
td(on) |
VGS = 10V, VDS = 15V |
— |
0.44 |
— |
ns |
| Rise Time |
tr |
ID = 20A, RGEN = 3.0Ω |
— |
3.7 |
— |
ns |
| Turn-Off Delay Time |
td(off) |
|
— |
10.3 |
— |
ns |
| Fall Time |
tf |
|
— |
4.1 |
— |
ns |
Gate Charge Characteristics
| Parameter |
Symbol |
Test Condition |
Min |
Typ |
Max |
Unit |
| Total Gate Charge (VGS = 10V) |
Qg |
VDS = 15V, ID = 20A |
— |
8.3 |
— |
nC |
| Total Gate Charge (VGS = 4.5V) |
Qg |
|
— |
3.9 |
— |
nC |
| Gate-Source Charge |
Qgs |
VGS = 10V |
— |
1.8 |
— |
nC |
| Gate-Drain Charge |
Qgd |
|
— |
0.99 |
— |
nC |
| Gate Plateau Voltage |
Vplateau |
|
— |
3.1 |
— |
V |
Drain-Source Diode Characteristics
| Parameter |
Symbol |
Test Condition |
Min |
Typ |
Max |
Unit |
| Body Diode Reverse Recovery Time |
trr |
IS = 20A, di/dt = 100A/µs |
— |
18 |
— |
ns |
| Body Diode Reverse Recovery Charge |
Qrr |
TJ = 25°C |
— |
3.7 |
— |
nC |
| Diode Forward Current |
IS |
TC = 25°C |
— |
— |
41 |
A |
Notes:
- This current is chip limited, which is calculated based on R_θJC.
- This current is calculated on single pulse with 10µs Pulse & Duty Cycle = 1%.
- Defined by design, not subject to production test.
- Device mounted on FR-4 substrate PC board with 2oz copper in 1inch square cooling area.
- Thermal resistance from junction to the exposed drain pad.
- Short duration pulse test used to minimize self-heating effect.
- Defined by design, not subject to production.
