SMT3001DLP product image

Product Detail

SMT3001DLP

SineSemi 中晶新源Core Authorized Distributor

LV & MV MOSFETsPDFN5060-8L
Download Datasheet

Specifications

Package
PDFN5060-8L
Configuration
N
VDS_Max
30 V
ID
180 A
RDS(ON)_Max @VGS=10V
1.7 mΩ
Automotive (Y/N)
N
VGS(th)_Typ
1.7 V
RDS(ON)_Typ @VGS=10V
1.4 mΩ
RDS(ON)_Typ @VGS=4.5V
2.1 mΩ
RDS(ON)_Max @VGS=4.5V
2.7 mΩ
VGS_Max
±20 V
Tj
150 °C
EAS_Max
292 mJ
Ciss_Typ
3231 pF
Coss_Typ
2186 pF
Crss_Typ
154 pF
Qg_Typ
51 nC
ESD
No
MPQ
5000 pcs
MOQ
50000 pcs
App: Motor Drive
Y
App: HF Power
Y
App: Battery Protection
Y
App: General Switch
Y

Package & Schematic

SMT3001DLP package outline, pin configuration and schematic
Package outline · Pin configuration · Schematic (from SineSemi official datasheet)

Online Datasheet

Compiled from the manufacturer's datasheet; the official document prevails.

SMT3001DLP

30V N-Channel Power MOSFET

Product Summary
VDS RDS(ON), max ID, max
30 V 1.7 mΩ @ VGS = 10V 180 A
2.7 mΩ @ VGS = 4.5V

PDFN5060-8L

Maximum Ratings (@ TC = 25°C, unless otherwise specified.)
Parameter Symbol Value Unit
Drain - Source Voltage VDS 30 V
Gate - Source Voltage VGS ±20 V
Continuous Drain Current (1) ID @ TC = 25°C 180 A
ID @ TC = 100°C 114 A
Pulsed Drain Current (2) IDM 718 A
Single Pulse Avalanche Energy (3) EAS 292 mJ
Single Pulse Avalanche Current (L = 0.1mH) IAS 37 A
Power Dissipation PD @ TC = 25°C 83 W
PD @ TC = 100°C 33 W
Junction & Storage Temperature Range TJ, TSTG -55~+150 °C
Thermal Characteristics
Parameter Symbol Typ Max Unit
Thermal Resistance, Junction-to-Ambient (4) R_θJA 36 45 °C/W
Thermal Resistance, Junction-to-Case (5) R_θJC 1.2 1.5 °C/W

Electrical Characteristics (@ TJ = 25°C, unless otherwise specified.)

Off Characteristics
Parameter Symbol Test Condition Min Typ Max Unit
Drain-Source Breakdown Voltage V(BR)DSS VGS = 0V, ID = 250µA 30 V
Zero Gate Voltage Drain Current IDSS VDS = 30V, VGS = 0V 1.0 µA
TJ = 125°C 100 µA
Gate-Source Leakage Current IGSS VGS = ±20V, VDS = 0V ±100 nA
On Characteristics
Parameter Symbol Test Condition Min Typ Max Unit
Gate Threshold Voltage VGS(th) VGS = VDS, ID = 250µA 1.2 1.7 2.5 V
Static Drain-Source On-Resistance RDS(on) VGS = 10V, ID = 20A 1.4 1.7
VGS = 4.5V, ID = 20A 2.1 2.7
Forward Transconductance gfs VDS = 5.0V, ID = 20A 30 S
Diodes Forward Voltage VSD IS = 2.0A, VGS = 0V 0.7 1.2 V
Dynamic Characteristics
Parameter Symbol Test Condition Min Typ Max Unit
Input Capacitance Ciss VDS = 15V, VGS = 0V, f = 1MHz 3231 pF
Output Capacitance Coss 2186 pF
Reverse Transfer Capacitance Crss 154 pF
Gate Resistance Rg VGS = 0V, VDS = 0V, f = 1MHz 2.1 Ω
Switching Characteristics
Parameter Symbol Test Condition Min Typ Max Unit
Turn-On Delay Time td(on) VGS = 10V, VDS = 15V 6.6 ns
Rise Time tr ID = 20A, RGEN = 3.0Ω 30 ns
Turn-Off Delay Time td(off) 34 ns
Fall Time tf 22 ns
Gate Charge Characteristics
Parameter Symbol Test Condition Min Typ Max Unit
Total Gate Charge (VGS = 10V) Qg VDS = 15V, ID = 20A 51 nC
Total Gate Charge (VGS = 4.5V) Qg 25 nC
Gate-Source Charge Qgs VGS = 10V 10.4 nC
Gate-Drain Charge Qgd 10.6 nC
Gate Plateau Voltage Vplateau 3.5 V
Drain-Source Diode Characteristics
Parameter Symbol Test Condition Min Typ Max Unit
Body Diode Reverse Recovery Time trr IS = 20A, di/dt = 100A/µs 49 ns
Body Diode Reverse Recovery Charge Qrr TJ = 25°C 58 nC
Diode Forward Current IS TC = 25°C 115 A

Notes:

  1. This current is chip limited, which is calculated based on R_θJC.
  2. This current is calculated on single pulse with 10µs Pulse & Duty Cycle = 1%.
  3. Defined by design, not subject to production test.
  4. Device mounted on FR-4 substrate PC board with 2oz copper in 1inch square cooling area.
  5. Thermal resistance from junction to the exposed drain pad.
  6. Short duration pulse test used to minimize self-heating effect.
  7. Defined by design, not subject to production.