SMT10T08ALR product image

Product Detail

SMT10T08ALR

SineSemi 中晶新源Core Authorized Distributor

LV & MV MOSFETsPDFN3333-8L
Download Datasheet

Specifications

Package
PDFN3333-8L
Configuration
N
VDS_Max
100 V
ID
50 A
RDS(ON)_Max @VGS=10V
8.5 mΩ
Automotive (Y/N)
N
VGS(th)_Typ
1.7 V
RDS(ON)_Typ @VGS=10V
7.1 mΩ
RDS(ON)_Typ @VGS=4.5V
9.1 mΩ
RDS(ON)_Max @VGS=4.5V
11 mΩ
VGS_Max
±20 V
Tj
150 °C
EAS_Max
160 mJ
Ciss_Typ
1278 pF
Coss_Typ
561 pF
Crss_Typ
12 pF
Qg_Typ
25 nC
ESD
No
MPQ
5000 pcs
MOQ
50000 pcs
App: HF Power
Y
App: Battery Protection
Y
App: General Switch
Y

Package & Schematic

SMT10T08ALR package outline, pin configuration and schematic
Package outline · Pin configuration · Schematic (from SineSemi official datasheet)

Online Datasheet

Compiled from the manufacturer's datasheet; the official document prevails.

SMT10T08ALR

100V N-Channel Power MOSFET

Product Summary
V_DS R_DS(ON), max I_D, max
100 V 8.5 mΩ @ V_GS = 10V 50 A
11 mΩ @ V_GS = 4.5V

PDFN3333-8L

Features
  • Low On-Resistance
  • Excellent FoM (figure of merit)
  • 100% UIS and R_g tested
  • RoHS compliant, HALOGEN FREE
Ordering Information
Orderable Part Number Package Type Device Marking Form Quantity (pcs)
SMT10T08ALR PDFN3333-8L 10T08AL 13" Tape&Reel 5,000
Maximum Ratings (@ T_A = 25°C, unless otherwise specified.)
Parameter Symbol Value Unit
Drain - Source Voltage V_DS 100 V
Gate - Source Voltage V_GS ±20 V
Continuous Drain Current (V_GS = 10V) ^(1) I_D T_A = 25°C: 50 A
T_A = 100°C: 32 A
Pulsed Drain Current ^(2) I_DM 200 A
Single Pulse Avalanche Energy ^(3) E_AS 160 mJ
Single Pulse Avalanche Current (L = 0.1mH) I_AS 34 A
Power Dissipation P_D T_A = 25°C: 39 W
T_A = 100°C: 16 W
Junction & Storage Temperature Range T_J, T_STG -55 ~ +150 °C
Thermal Characteristics
Parameter Symbol Typ Max Unit
Thermal Resistance, Junction-to-Ambient ^(4) R_θJA 45 56 °C/W
Thermal Resistance, Junction-to-Case ^(5) R_θJC 2.5 3.2 °C/W

Electrical Characteristics (@ T_J = 25°C, unless otherwise specified.)

Off Characteristics ^(7)
Parameter Symbol Test Condition Min Typ Max Unit
Drain-Source Breakdown Voltage V_(BR)DSS V_GS = 0V, I_D = 250µA 100 V
Zero Gate Voltage Drain Current I_DSS V_DS = 100V, V_GS = 0V 1.0 µA
T_J = 125°C 100 µA
Gate-Source Leakage Current I_GSS V_GS = ±20V, V_DS = 0V ±100 nA
On Characteristics ^(7)
Parameter Symbol Test Condition Min Typ Max Unit
Gate Threshold Voltage V_GS(th) V_DS = V_GS, I_D = 250µA 1.2 1.7 2.5 V
Static Drain-Source On-Resistance R_DS(on) V_GS = 10V, I_D = 20A 7.1 8.5
V_GS = 4.5V, I_D = 15A 9.1 11
Forward Transconductance g_fs V_DS = 5.0V, I_D = 20A 30 S
Diodes Forward Voltage V_SD I_S = 2.0A, V_GS = 0V 0.7 1.2 V
Dynamic Characteristics ^(7)
Parameter Symbol Test Condition Min Typ Max Unit
Input Capacitance C_iss V_DS = 50V, V_GS = 0V, f = 1MHz 1278 pF
Output Capacitance C_oss 561 pF
Reverse Transfer Capacitance C_rss 12 pF
Gate Resistance R_g V_GS = 0V, V_DS = 0V, f = 1MHz 1.5 Ω
Switching Characteristics ^(7)
Parameter Symbol Test Condition Min Typ Max Unit
Turn-On Delay Time t_d(on) V_GS = 10V, V_DS = 50V 3.2 ns
Rise Time t_r I_D = 20A, R_GEN = 3.0Ω 6.6 ns
Turn-Off Delay Time t_d(off) 20 ns
Fall Time t_f 14 ns
Gate Charge Characteristics ^(7)
Parameter Symbol Test Condition Min Typ Max Unit
Total Gate Charge (V_GS = 10V) Q_g V_DS = 50V, I_D = 25A 25 nC
Total Gate Charge (V_GS = 4.5V) Q_g 12.6 nC
Gate-Source Charge Q_gs V_GS = 10V 3.6 nC
Gate-Drain Charge Q_gd 5.4 nC
Gate Plateau Voltage V_plateau 2.8 V
Drain-Source Diode Characteristics ^(7)
Parameter Symbol Test Condition Min Typ Max Unit
Body Diode Reverse Recovery Time t_rr I_S = 20A, di/dt = 100A/µs 45 ns
Body Diode Reverse Recovery Charge Q_rr T_J = 25°C 53 nC
Diode Forward Current I_S T_A = 25°C 49 A

Notes:

  1. This current is chip limited, which is calculated based on RθJC.
  2. This current is calculated on single pulse with 10µs Pulse & Duty Cycle = 1%.
  3. Defined by design, not subject to production test. E_AS condition, T_J=25°C, V_DS=50V, V_GS=10V, L=1.0mH.
  4. Device mounted on FR-4 substrate PC board with 2oz copper in 1inch square cooling area.
  5. Thermal resistance from junction to soldering point (on the exposed drain pad).
  6. Short duration pulse test used to minimize self-heating effect.
  7. Defined by design; not subject to production.