SMV09N50WFU product image

Product Detail

SMV09N50WFU

SineSemi 中晶新源Core Authorized Distributor

HV MOSFETs

Specifications

Tj
150 °C
VDS_Max
500 V
ID_Max
9 A
RDS(ON)_Typ @VGS=10V
680 mΩ
RDS(ON)_Max @VGS=10V
800 mΩ
VGS_Max
±30 V
EAS_Max
408 mJ
Ciss_Typ
1135 pF
Coss_Typ
110 pF
Crss_Typ
12 pF
Qg_Typ
23 nC

Online Datasheet

Compiled from the manufacturer's datasheet; the official document prevails.

SMV09N50WFU

500V 9A 0.68Ω N-ch Power MOSFET

Product Summary
V_DS R_DS(ON), max I_D, max
500 V 0.68 Ω @ V_GS = 10V 9.0 A

TO252-3L

Features
  • Typ RDS(on) 0.68Ω@VGS=10V
  • 100% avalanche tested
  • RoHS Compliant
Applications
  • SMPS
  • Charger
  • DC-DC
Mechanical Data
  • Green Molding Compound
  • Moisture Sensitivity: Level 3 per J-STD-020
  • UL Flammability Classification Rating 94V-0
Ordering Information
Orderable Part Number Package Type Device Marking Form Quantity (pcs)
SMV09N50AFU TO252-3L 09N50AF 13" Tape&Reel 2,500
Maximum Ratings (@ T_A = 25°C, unless otherwise specified.)
Parameter Symbol Value Units
Drain - Source Voltage V_DS 500 V
Gate - Source Voltage V_GS ±30 V
Continuous Drain Current (V_GS = 10V) ^(1) I_D @ T_A = 25°C 9.0 A
Pulsed Drain Current ^(2) I_DM 36 A
Single Pulse Avalanche Energy ^(3) E_AS 408 mJ
Power Dissipation P_D @ T_A = 25°C 104 W
Junction & Storage Temperature Range T_J, T_STG -55 ~ +150 °C
Thermal Characteristics
Parameter Symbol Typ Max Unit
Thermal Resistance, Junction-to-Ambient ^(4) R_θJA 62 °C/W
Thermal Resistance, Junction-to-Case ^(5) R_θJC 1.2 °C/W

Electrical Characteristics (@ T_J = 25°C, unless otherwise specified.)

Off Characteristics ^(6)
Parameter Symbol Test Condition Min Typ Max Units
Drain-Source Breakdown Voltage V_(BR)DSS V_GS = 0V, I_D = 250µA 500 V
Drain-Source Leakage Current I_DSS V_DS = 500, V_GS = 0V 1.0 µA
V_DS = 400, V_GS = 0V 100 µA
Gate-Source Leakage Current I_GSS V_GS = ±30V, V_DS = 0V ±100 nA
On Characteristics ^(6)
Parameter Symbol Test Condition Min Typ Max Units
Gate Threshold Voltage V_GS(th) V_GS = V_DS, I_D = 250µA 2.0 4.0 V
Static Drain-Source On-Resistance R_DS(on) V_GS = 10V, I_D = 4.5A 0.68 0.80 Ω
Diodes Forward Voltage V_SD I_S = 9.0A, V_GS = 0V 1.4 V
Dynamic Characteristics ^(8)
Parameter Symbol Test Condition Min Typ Max Units
Input Capacitance C_iss 1135 pF
Output Capacitance C_oss V_DS = 25V, V_GS = 0V, f = 1.0MHz 110 pF
Reverse Transfer Capacitance C_rss 12 pF
Switching Characteristics ^(6)
Parameter Symbol Test Condition Min Typ Max Units
Turn-On Delay Time t_d(on) 18 ns
Rise Time t_r V_DS = 6...10V, V_GS = 400V 36 ns
Turn-Off Delay Time t_d(off) I_D = 9.0A, R_GEN = 25Ω 70 ns
Fall Time t_f 30 ns
Gate Charge Characteristics ^(7)
Parameter Symbol Test Condition Min Typ Max Units
Total Gate Charge (V_GS = 10V) Q_g 23 nC
Gate-Source Charge Q_gs V_DS = 250V, I_D = 9.0A 7.0 nC
Gate-Drain Charge Q_gd 7.0 nC
Drain-Source Diode Characteristics ^(6)
Parameter Symbol Test Condition Min Typ Max Units
Body Diode Recovery Time t_rr 276 ns
Body Diode Reverse Recovery Charge Q_rr V_DD = 400V, V_GS = 10V 2.9 µC
Body Diode Reverse Recovery Current I_RM I_S = 9.0A, di/dt = 100A/ns 21 A
Diode Forward Current I_S T_J = 25°C 9.0 A

Notes:

  1. This current is chip limited, which is calculated based on Rθjc.
  2. This current is calculated on single pulse with 10µs Pulse & Duty Cycle = 1%.
  3. Defined by design; not subject to production test. E_AS condition: T_J=25°C, V_DD=50V, V_GS=10V, L=10mH, I_AS=9A.
  4. Device mounted on FR4 substrate PC board with 2oz copper on 1inch square cooling area.
  5. Thermal resistance from junction to soldering point (on the exposed drain pad).
  6. Short duration pulse test used to minimize self-heating effect.
  7. Defined by design, not subject to production.
  8. C_oss is a fixed capacitance that gives the same stored energy as C_oss while V_DS is rising from 0 to 480V.
  9. C_oss is a fixed capacitance that gives the same charging time as C_oss while V_DS is rising from 0 to 480V.